PCI: iproc: Add 500ms delay during device shutdown
During soft reset (e.g., "reboot" from Linux) on some iProc-based SOCs, the LCPLL clock and PERST both go off simultaneously. This seems in accordance with the PCIe Card Electromechanical spec, r2.0, sec 2.2.3, which says the clock goes inactive after PERST# goes active, but doesn't specify how long the clock should be valid after PERST#. However, we have observed that with the iProc Stingray, some Intel NVMe endpoints, e.g., the P3700 400GB series, are not detected correctly upon the next boot sequence unless the clock remains valid for some time after PERST# is asserted. Delay 500ms after asserting PERST# before performing a reboot. The 500ms is experimentally determined. Signed-off-by: Oza Pawandeep <oza.oza@broadcom.com> [bhelgaas: changelog, add spec reference, fold in iproc_pcie_shutdown() export from Arnd Bergmann <arnd@arndb.de>] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com>
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@ -134,6 +134,13 @@ static int iproc_pcie_pltfm_remove(struct platform_device *pdev)
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return iproc_pcie_remove(pcie);
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}
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static void iproc_pcie_pltfm_shutdown(struct platform_device *pdev)
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{
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struct iproc_pcie *pcie = platform_get_drvdata(pdev);
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iproc_pcie_shutdown(pcie);
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}
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static struct platform_driver iproc_pcie_pltfm_driver = {
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.driver = {
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.name = "iproc-pcie",
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@ -141,6 +148,7 @@ static struct platform_driver iproc_pcie_pltfm_driver = {
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},
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.probe = iproc_pcie_pltfm_probe,
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.remove = iproc_pcie_pltfm_remove,
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.shutdown = iproc_pcie_pltfm_shutdown,
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};
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module_platform_driver(iproc_pcie_pltfm_driver);
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@ -671,7 +671,7 @@ static struct pci_ops iproc_pcie_ops = {
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.write = iproc_pcie_config_write32,
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};
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static void iproc_pcie_reset(struct iproc_pcie *pcie)
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static void iproc_pcie_perst_ctrl(struct iproc_pcie *pcie, bool assert)
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{
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u32 val;
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@ -683,21 +683,29 @@ static void iproc_pcie_reset(struct iproc_pcie *pcie)
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if (pcie->ep_is_internal)
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return;
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/*
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* Select perst_b signal as reset source. Put the device into reset,
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* and then bring it out of reset
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*/
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val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL);
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val &= ~EP_PERST_SOURCE_SELECT & ~EP_MODE_SURVIVE_PERST &
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~RC_PCIE_RST_OUTPUT;
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iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val);
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udelay(250);
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val |= RC_PCIE_RST_OUTPUT;
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iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val);
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msleep(100);
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if (assert) {
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val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL);
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val &= ~EP_PERST_SOURCE_SELECT & ~EP_MODE_SURVIVE_PERST &
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~RC_PCIE_RST_OUTPUT;
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iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val);
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udelay(250);
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} else {
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val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL);
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val |= RC_PCIE_RST_OUTPUT;
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iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val);
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msleep(100);
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}
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}
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int iproc_pcie_shutdown(struct iproc_pcie *pcie)
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{
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iproc_pcie_perst_ctrl(pcie, true);
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msleep(500);
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return 0;
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}
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EXPORT_SYMBOL_GPL(iproc_pcie_shutdown);
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static int iproc_pcie_check_link(struct iproc_pcie *pcie)
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{
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struct device *dev = pcie->dev;
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@ -1379,7 +1387,8 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
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goto err_exit_phy;
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}
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iproc_pcie_reset(pcie);
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iproc_pcie_perst_ctrl(pcie, true);
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iproc_pcie_perst_ctrl(pcie, false);
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if (pcie->need_ob_cfg) {
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ret = iproc_pcie_map_ranges(pcie, res);
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@ -110,6 +110,7 @@ struct iproc_pcie {
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int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res);
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int iproc_pcie_remove(struct iproc_pcie *pcie);
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int iproc_pcie_shutdown(struct iproc_pcie *pcie);
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#ifdef CONFIG_PCIE_IPROC_MSI
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int iproc_msi_init(struct iproc_pcie *pcie, struct device_node *node);
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