spi: fsl-espi: Only process interrupts for expected events
The SPIE register contains counts for the TX FIFO so any time the irq
handler was invoked we would attempt to process the RX/TX fifos. Use the
SPIM value to mask the events so that we only process interrupts that
were expected.
This was a latent issue exposed by commit 3282a3da25
("powerpc/64:
Implement soft interrupt replay in C").
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Link: https://lore.kernel.org/r/20200904002812.7300-1-chris.packham@alliedtelesis.co.nz
Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -564,13 +564,14 @@ static void fsl_espi_cpu_irq(struct fsl_espi *espi, u32 events)
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static irqreturn_t fsl_espi_irq(s32 irq, void *context_data)
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{
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struct fsl_espi *espi = context_data;
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u32 events;
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u32 events, mask;
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spin_lock(&espi->lock);
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/* Get interrupt events(tx/rx) */
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events = fsl_espi_read_reg(espi, ESPI_SPIE);
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if (!events) {
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mask = fsl_espi_read_reg(espi, ESPI_SPIM);
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if (!(events & mask)) {
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spin_unlock(&espi->lock);
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return IRQ_NONE;
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}
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