qed: changes to ILT to support XRC
First ILT page for TSDM client is allocated for XRC-SRQ's. For regular SRQ's skip first ILT page that is reserved for XRC-SRQ's. Signed-off-by: Michal Kalderon <mkalderon@marvell.com> Signed-off-by: Yuval Bason <ybason@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -110,6 +110,7 @@ struct src_ent {
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ALIGNED_TYPE_SIZE(union conn_context, p_hwfn)
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ALIGNED_TYPE_SIZE(union conn_context, p_hwfn)
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#define SRQ_CXT_SIZE (sizeof(struct rdma_srq_context))
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#define SRQ_CXT_SIZE (sizeof(struct rdma_srq_context))
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#define XRC_SRQ_CXT_SIZE (sizeof(struct rdma_xrc_srq_context))
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#define TYPE0_TASK_CXT_SIZE(p_hwfn) \
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#define TYPE0_TASK_CXT_SIZE(p_hwfn) \
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ALIGNED_TYPE_SIZE(union type0_task_context, p_hwfn)
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ALIGNED_TYPE_SIZE(union type0_task_context, p_hwfn)
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@ -293,18 +294,40 @@ static struct qed_tid_seg *qed_cxt_tid_seg_info(struct qed_hwfn *p_hwfn,
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return NULL;
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return NULL;
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}
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}
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static void qed_cxt_set_srq_count(struct qed_hwfn *p_hwfn, u32 num_srqs)
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static void qed_cxt_set_srq_count(struct qed_hwfn *p_hwfn,
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u32 num_srqs, u32 num_xrc_srqs)
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{
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{
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struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr;
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struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr;
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p_mgr->srq_count = num_srqs;
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p_mgr->srq_count = num_srqs;
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p_mgr->xrc_srq_count = num_xrc_srqs;
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}
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}
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u32 qed_cxt_get_srq_count(struct qed_hwfn *p_hwfn)
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u32 qed_cxt_get_ilt_page_size(struct qed_hwfn *p_hwfn,
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enum ilt_clients ilt_client)
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{
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struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
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struct qed_ilt_client_cfg *p_cli = &p_mngr->clients[ilt_client];
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return ILT_PAGE_IN_BYTES(p_cli->p_size.val);
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}
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static u32 qed_cxt_xrc_srqs_per_page(struct qed_hwfn *p_hwfn)
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{
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u32 page_size;
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page_size = qed_cxt_get_ilt_page_size(p_hwfn, ILT_CLI_TSDM);
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return page_size / XRC_SRQ_CXT_SIZE;
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}
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u32 qed_cxt_get_total_srq_count(struct qed_hwfn *p_hwfn)
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{
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{
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struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr;
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struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr;
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u32 total_srqs;
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return p_mgr->srq_count;
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total_srqs = p_mgr->srq_count + p_mgr->xrc_srq_count;
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return total_srqs;
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}
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}
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/* set the iids count per protocol */
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/* set the iids count per protocol */
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@ -692,7 +715,7 @@ int qed_cxt_cfg_ilt_compute(struct qed_hwfn *p_hwfn, u32 *line_count)
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}
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}
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/* TSDM (SRQ CONTEXT) */
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/* TSDM (SRQ CONTEXT) */
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total = qed_cxt_get_srq_count(p_hwfn);
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total = qed_cxt_get_total_srq_count(p_hwfn);
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if (total) {
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if (total) {
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p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_TSDM]);
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p_cli = qed_cxt_set_cli(&p_mngr->clients[ILT_CLI_TSDM]);
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@ -1962,11 +1985,9 @@ static void qed_rdma_set_pf_params(struct qed_hwfn *p_hwfn,
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struct qed_rdma_pf_params *p_params,
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struct qed_rdma_pf_params *p_params,
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u32 num_tasks)
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u32 num_tasks)
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{
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{
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u32 num_cons, num_qps, num_srqs;
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u32 num_cons, num_qps;
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enum protocol_type proto;
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enum protocol_type proto;
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num_srqs = min_t(u32, QED_RDMA_MAX_SRQS, p_params->num_srqs);
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if (p_hwfn->mcp_info->func_info.protocol == QED_PCI_ETH_RDMA) {
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if (p_hwfn->mcp_info->func_info.protocol == QED_PCI_ETH_RDMA) {
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DP_NOTICE(p_hwfn,
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DP_NOTICE(p_hwfn,
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"Current day drivers don't support RoCE & iWARP simultaneously on the same PF. Default to RoCE-only\n");
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"Current day drivers don't support RoCE & iWARP simultaneously on the same PF. Default to RoCE-only\n");
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@ -1989,6 +2010,8 @@ static void qed_rdma_set_pf_params(struct qed_hwfn *p_hwfn,
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}
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}
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if (num_cons && num_tasks) {
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if (num_cons && num_tasks) {
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u32 num_srqs, num_xrc_srqs;
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qed_cxt_set_proto_cid_count(p_hwfn, proto, num_cons, 0);
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qed_cxt_set_proto_cid_count(p_hwfn, proto, num_cons, 0);
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/* Deliberatly passing ROCE for tasks id. This is because
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/* Deliberatly passing ROCE for tasks id. This is because
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@ -1997,7 +2020,13 @@ static void qed_rdma_set_pf_params(struct qed_hwfn *p_hwfn,
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qed_cxt_set_proto_tid_count(p_hwfn, PROTOCOLID_ROCE,
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qed_cxt_set_proto_tid_count(p_hwfn, PROTOCOLID_ROCE,
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QED_CXT_ROCE_TID_SEG, 1,
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QED_CXT_ROCE_TID_SEG, 1,
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num_tasks, false);
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num_tasks, false);
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qed_cxt_set_srq_count(p_hwfn, num_srqs);
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num_srqs = min_t(u32, QED_RDMA_MAX_SRQS, p_params->num_srqs);
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/* XRC SRQs populate a single ILT page */
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num_xrc_srqs = qed_cxt_xrc_srqs_per_page(p_hwfn);
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qed_cxt_set_srq_count(p_hwfn, num_srqs, num_xrc_srqs);
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} else {
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} else {
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DP_INFO(p_hwfn->cdev,
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DP_INFO(p_hwfn->cdev,
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"RDMA personality used without setting params!\n");
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"RDMA personality used without setting params!\n");
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@ -2163,10 +2192,17 @@ qed_cxt_dynamic_ilt_alloc(struct qed_hwfn *p_hwfn,
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p_blk = &p_cli->pf_blks[CDUC_BLK];
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p_blk = &p_cli->pf_blks[CDUC_BLK];
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break;
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break;
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case QED_ELEM_SRQ:
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case QED_ELEM_SRQ:
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/* The first ILT page is not used for regular SRQs. Skip it. */
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iid += p_hwfn->p_cxt_mngr->xrc_srq_count;
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p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TSDM];
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p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TSDM];
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elem_size = SRQ_CXT_SIZE;
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elem_size = SRQ_CXT_SIZE;
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p_blk = &p_cli->pf_blks[SRQ_BLK];
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p_blk = &p_cli->pf_blks[SRQ_BLK];
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break;
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break;
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case QED_ELEM_XRC_SRQ:
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p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_TSDM];
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elem_size = XRC_SRQ_CXT_SIZE;
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p_blk = &p_cli->pf_blks[SRQ_BLK];
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break;
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case QED_ELEM_TASK:
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case QED_ELEM_TASK:
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p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT];
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p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT];
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elem_size = TYPE1_TASK_CXT_SIZE(p_hwfn);
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elem_size = TYPE1_TASK_CXT_SIZE(p_hwfn);
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@ -2386,8 +2422,12 @@ int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto)
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return rc;
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return rc;
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/* Free TSDM CXT */
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/* Free TSDM CXT */
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rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_SRQ, 0,
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rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_XRC_SRQ, 0,
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qed_cxt_get_srq_count(p_hwfn));
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p_hwfn->p_cxt_mngr->xrc_srq_count);
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rc = qed_cxt_free_ilt_range(p_hwfn, QED_ELEM_SRQ,
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p_hwfn->p_cxt_mngr->xrc_srq_count,
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p_hwfn->p_cxt_mngr->srq_count);
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return rc;
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return rc;
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}
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}
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@ -82,7 +82,8 @@ int qed_cxt_get_tid_mem_info(struct qed_hwfn *p_hwfn,
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enum qed_cxt_elem_type {
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enum qed_cxt_elem_type {
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QED_ELEM_CXT,
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QED_ELEM_CXT,
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QED_ELEM_SRQ,
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QED_ELEM_SRQ,
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QED_ELEM_TASK
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QED_ELEM_TASK,
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QED_ELEM_XRC_SRQ,
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};
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};
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u32 qed_cxt_get_proto_cid_count(struct qed_hwfn *p_hwfn,
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u32 qed_cxt_get_proto_cid_count(struct qed_hwfn *p_hwfn,
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@ -235,7 +236,6 @@ u32 qed_cxt_get_proto_tid_count(struct qed_hwfn *p_hwfn,
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enum protocol_type type);
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enum protocol_type type);
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u32 qed_cxt_get_proto_cid_start(struct qed_hwfn *p_hwfn,
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u32 qed_cxt_get_proto_cid_start(struct qed_hwfn *p_hwfn,
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enum protocol_type type);
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enum protocol_type type);
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u32 qed_cxt_get_srq_count(struct qed_hwfn *p_hwfn);
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int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto);
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int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto);
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#define QED_CTX_WORKING_MEM 0
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#define QED_CTX_WORKING_MEM 0
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@ -358,6 +358,7 @@ struct qed_cxt_mngr {
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/* total number of SRQ's for this hwfn */
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/* total number of SRQ's for this hwfn */
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u32 srq_count;
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u32 srq_count;
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u32 xrc_srq_count;
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/* Maximal number of L2 steering filters */
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/* Maximal number of L2 steering filters */
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u32 arfs_count;
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u32 arfs_count;
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@ -372,4 +373,9 @@ u16 qed_get_cdut_num_vf_init_pages(struct qed_hwfn *p_hwfn);
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u16 qed_get_cdut_num_pf_work_pages(struct qed_hwfn *p_hwfn);
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u16 qed_get_cdut_num_pf_work_pages(struct qed_hwfn *p_hwfn);
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u16 qed_get_cdut_num_vf_work_pages(struct qed_hwfn *p_hwfn);
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u16 qed_get_cdut_num_vf_work_pages(struct qed_hwfn *p_hwfn);
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u32 qed_cxt_get_ilt_page_size(struct qed_hwfn *p_hwfn,
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enum ilt_clients ilt_client);
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u32 qed_cxt_get_total_srq_count(struct qed_hwfn *p_hwfn);
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#endif
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#endif
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@ -2269,6 +2269,7 @@ int qed_resc_alloc(struct qed_dev *cdev)
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/* EQ */
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/* EQ */
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n_eqes = qed_chain_get_capacity(&p_hwfn->p_spq->chain);
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n_eqes = qed_chain_get_capacity(&p_hwfn->p_spq->chain);
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if (QED_IS_RDMA_PERSONALITY(p_hwfn)) {
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if (QED_IS_RDMA_PERSONALITY(p_hwfn)) {
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u32 n_srq = qed_cxt_get_total_srq_count(p_hwfn);
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enum protocol_type rdma_proto;
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enum protocol_type rdma_proto;
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if (QED_IS_ROCE_PERSONALITY(p_hwfn))
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if (QED_IS_ROCE_PERSONALITY(p_hwfn))
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@ -2279,7 +2280,10 @@ int qed_resc_alloc(struct qed_dev *cdev)
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num_cons = qed_cxt_get_proto_cid_count(p_hwfn,
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num_cons = qed_cxt_get_proto_cid_count(p_hwfn,
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rdma_proto,
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rdma_proto,
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NULL) * 2;
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NULL) * 2;
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n_eqes += num_cons + 2 * MAX_NUM_VFS_BB;
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/* EQ should be able to get events from all SRQ's
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* at the same time
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*/
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n_eqes += num_cons + 2 * MAX_NUM_VFS_BB + n_srq;
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} else if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) {
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} else if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) {
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num_cons =
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num_cons =
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qed_cxt_get_proto_cid_count(p_hwfn,
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qed_cxt_get_proto_cid_count(p_hwfn,
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@ -272,7 +272,7 @@ static int qed_rdma_alloc(struct qed_hwfn *p_hwfn)
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}
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}
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/* Allocate bitmap for srqs */
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/* Allocate bitmap for srqs */
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p_rdma_info->num_srqs = qed_cxt_get_srq_count(p_hwfn);
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p_rdma_info->num_srqs = p_hwfn->p_cxt_mngr->srq_count;
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rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->srq_map,
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rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->srq_map,
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p_rdma_info->num_srqs, "SRQ");
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p_rdma_info->num_srqs, "SRQ");
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if (rc) {
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if (rc) {
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