irqchip fixes for Linux 5.16, take #2
- Fix Armada-370-XP Multi-MSi allocation to be aligned on the allocation size, as required by the PCI spec - Fix aspeed-scu interrupt acknowledgement by directly writing to the register instead of a read-modify-write sequence - Use standard bitfirl helpers in the MIPS GIC driver instead of custom constructs - Fix the NVIC driver IPR register offset - Correctly drop the reference of the device node in the irq-bcm7120-l2 driver - Fix the GICv3 ITS INVALL command by issueing a following SYNC command - Add a missing __init attribute to the init function of the Apple AIC driver -----BEGIN PGP SIGNATURE----- iQJDBAABCgAtFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAmGzVZ0PHG1hekBrZXJu ZWwub3JnAAoJECPQ0LrRPXpDdc0P+QFr9F1sqKzbszAJ7A8fSdbh351kB/YAJ3tB 9azS6KnIEr0/v1uG3s41iOjRsvt88RpetWq+6VWE9HV5NHXykrjf/IYYlEu6H0Yd RmIoxXxMj46jpbCb8hRCs6JEtu/lJP9zdUdaf42xq76ouHmDYwD4nPGPBQegEtk2 RQ8vIzovfpplwxZm8kIAOcBhbbJ1gu1n4W15oaKfMvN2fx06vxW6URGCzcCiogD8 KTkyragf/b9uuWA4/D3WUSR94Yw4eLVZPPtWa3Qr28aEDUyCzyjQIC0u7nzB+cC6 yNl6VOOQks0359YpaJyzvv77r7lETpHTpAF8aXlvlxDdQ4KUy95cC4+3YyKmam17 3mstiRM31KIeZE08R1fjwPscQQA0bjJqJs70fEO3BjpJ7YtoP6AVQiNb2648A6RW eXi/k3RKPCiWc11vz6+NTbbpmFGgA5S8VoWpvpi92rUr0Gkhy3MoBASWGcB5oP+e H/F4WTVYVPkNia9GFjaSWERUUwhB6wCyyXgDTfHmuMUsXIuLhmQxGfEftJ0l5DCc idxfSfFRl8AuwzQo2v62d6GZYjFvwJfc0BkFqThDjTFC0iYzfPwAajFHYoXIDRZa gfWrms+2XAiBnnMoIBSDHXRLPVuB8y1PHOahBBm3zLB+SSWg8qmr8A99UzNnwk8K OiH8vaGC =ES2K -----END PGP SIGNATURE----- Merge tag 'irqchip-fixes-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent Pull irqchip fixes from Marc Zyngier: - Fix Armada-370-XP Multi-MSi allocation to be aligned on the allocation size, as required by the PCI spec - Fix aspeed-scu interrupt acknowledgement by directly writing to the register instead of a read-modify-write sequence - Use standard bitfirl helpers in the MIPS GIC driver instead of custom constructs - Fix the NVIC driver IPR register offset - Correctly drop the reference of the device node in the irq-bcm7120-l2 driver - Fix the GICv3 ITS INVALL command by issueing a following SYNC command - Add a missing __init attribute to the init function of the Apple AIC driver Link: https://lore.kernel.org/r/20211210133516.664497-1-maz@kernel.org
This commit is contained in:
commit
b7fd35a0ad
|
@ -707,7 +707,7 @@ static const struct irq_domain_ops aic_ipi_domain_ops = {
|
|||
.free = aic_ipi_free,
|
||||
};
|
||||
|
||||
static int aic_init_smp(struct aic_irq_chip *irqc, struct device_node *node)
|
||||
static int __init aic_init_smp(struct aic_irq_chip *irqc, struct device_node *node)
|
||||
{
|
||||
struct irq_domain *ipi_domain;
|
||||
int base_ipi;
|
||||
|
|
|
@ -232,17 +232,13 @@ static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq,
|
|||
int hwirq, i;
|
||||
|
||||
mutex_lock(&msi_used_lock);
|
||||
|
||||
hwirq = bitmap_find_next_zero_area(msi_used, PCI_MSI_DOORBELL_NR,
|
||||
0, nr_irqs, 0);
|
||||
if (hwirq >= PCI_MSI_DOORBELL_NR) {
|
||||
mutex_unlock(&msi_used_lock);
|
||||
return -ENOSPC;
|
||||
}
|
||||
|
||||
bitmap_set(msi_used, hwirq, nr_irqs);
|
||||
hwirq = bitmap_find_free_region(msi_used, PCI_MSI_DOORBELL_NR,
|
||||
order_base_2(nr_irqs));
|
||||
mutex_unlock(&msi_used_lock);
|
||||
|
||||
if (hwirq < 0)
|
||||
return -ENOSPC;
|
||||
|
||||
for (i = 0; i < nr_irqs; i++) {
|
||||
irq_domain_set_info(domain, virq + i, hwirq + i,
|
||||
&armada_370_xp_msi_bottom_irq_chip,
|
||||
|
@ -250,7 +246,7 @@ static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq,
|
|||
NULL, NULL);
|
||||
}
|
||||
|
||||
return hwirq;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void armada_370_xp_msi_free(struct irq_domain *domain,
|
||||
|
@ -259,7 +255,7 @@ static void armada_370_xp_msi_free(struct irq_domain *domain,
|
|||
struct irq_data *d = irq_domain_get_irq_data(domain, virq);
|
||||
|
||||
mutex_lock(&msi_used_lock);
|
||||
bitmap_clear(msi_used, d->hwirq, nr_irqs);
|
||||
bitmap_release_region(msi_used, d->hwirq, order_base_2(nr_irqs));
|
||||
mutex_unlock(&msi_used_lock);
|
||||
}
|
||||
|
||||
|
|
|
@ -76,8 +76,8 @@ static void aspeed_scu_ic_irq_handler(struct irq_desc *desc)
|
|||
generic_handle_domain_irq(scu_ic->irq_domain,
|
||||
bit - scu_ic->irq_shift);
|
||||
|
||||
regmap_update_bits(scu_ic->scu, scu_ic->reg, mask,
|
||||
BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
|
||||
regmap_write_bits(scu_ic->scu, scu_ic->reg, mask,
|
||||
BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
|
||||
}
|
||||
|
||||
chained_irq_exit(chip, desc);
|
||||
|
|
|
@ -238,6 +238,7 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn,
|
|||
}
|
||||
|
||||
data->num_parent_irqs = platform_irq_count(pdev);
|
||||
put_device(&pdev->dev);
|
||||
if (data->num_parent_irqs <= 0) {
|
||||
pr_err("invalid number of parent interrupts\n");
|
||||
ret = -ENOMEM;
|
||||
|
|
|
@ -742,7 +742,7 @@ static struct its_collection *its_build_invall_cmd(struct its_node *its,
|
|||
|
||||
its_fixup_cmd(cmd);
|
||||
|
||||
return NULL;
|
||||
return desc->its_invall_cmd.col;
|
||||
}
|
||||
|
||||
static struct its_vpe *its_build_vinvall_cmd(struct its_node *its,
|
||||
|
|
|
@ -9,6 +9,7 @@
|
|||
|
||||
#define pr_fmt(fmt) "irq-mips-gic: " fmt
|
||||
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/bitmap.h>
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/cpuhotplug.h>
|
||||
|
@ -735,8 +736,7 @@ static int __init gic_of_init(struct device_node *node,
|
|||
mips_gic_base = ioremap(gic_base, gic_len);
|
||||
|
||||
gicconfig = read_gic_config();
|
||||
gic_shared_intrs = gicconfig & GIC_CONFIG_NUMINTERRUPTS;
|
||||
gic_shared_intrs >>= __ffs(GIC_CONFIG_NUMINTERRUPTS);
|
||||
gic_shared_intrs = FIELD_GET(GIC_CONFIG_NUMINTERRUPTS, gicconfig);
|
||||
gic_shared_intrs = (gic_shared_intrs + 1) * 8;
|
||||
|
||||
if (cpu_has_veic) {
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
|
||||
#define NVIC_ISER 0x000
|
||||
#define NVIC_ICER 0x080
|
||||
#define NVIC_IPR 0x300
|
||||
#define NVIC_IPR 0x400
|
||||
|
||||
#define NVIC_MAX_BANKS 16
|
||||
/*
|
||||
|
|
Loading…
Reference in New Issue