drm: xlnx: zynqmp_dpsub: Pass disp structure to all internal functions

The internal functions dealing with the audio/video buffer manager, the
blender, and the audio mixer, all receive pointers to the respective
objects. Those objects are embedded in the zynqmp_disp structure, and a
very small. Treating them as separate objects would require expanding
them with back-pointers to the zynqmp_disp in order to access fields
such as the device pointer for debug messages, and this isn't worth it.

Instead, merge those structures with the zynqmp_disp structure, and pass
the zynqmp_disp pointer to all internal functions.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
This commit is contained in:
Laurent Pinchart 2021-03-07 02:56:58 +02:00
parent 1e42874b0d
commit b7f4753d7b
1 changed files with 121 additions and 145 deletions

View File

@ -158,43 +158,17 @@ struct zynqmp_disp_layer {
enum zynqmp_disp_layer_mode mode;
};
/**
* struct zynqmp_disp_blend - Blender
* @base: Registers I/O base address
*/
struct zynqmp_disp_blend {
void __iomem *base;
};
/**
* struct zynqmp_disp_avbuf - Audio/video buffer manager
* @base: Registers I/O base address
*/
struct zynqmp_disp_avbuf {
void __iomem *base;
};
/**
* struct zynqmp_disp_audio - Audio mixer
* @base: Registers I/O base address
* @clk: Audio clock
* @clk_from_ps: True of the audio clock comes from PS, false from PL
*/
struct zynqmp_disp_audio {
void __iomem *base;
struct clk *clk;
bool clk_from_ps;
};
/**
* struct zynqmp_disp - Display controller
* @dev: Device structure
* @drm: DRM core
* @dpsub: Display subsystem
* @crtc: DRM CRTC
* @blend: Blender (video rendering pipeline)
* @avbuf: Audio/video buffer manager
* @audio: Audio mixer
* @blend.base: Register I/O base address for the blender
* @avbuf.base: Register I/O base address for the audio/video buffer manager
* @audio.base: Registers I/O base address for the audio mixer
* @audio.clk: Audio clock
* @audio.clk_from_ps: True of the audio clock comes from PS, false from PL
* @layers: Layers (planes)
* @event: Pending vblank event request
* @pclk: Pixel clock
@ -207,9 +181,17 @@ struct zynqmp_disp {
struct drm_crtc crtc;
struct zynqmp_disp_blend blend;
struct zynqmp_disp_avbuf avbuf;
struct zynqmp_disp_audio audio;
struct {
void __iomem *base;
} blend;
struct {
void __iomem *base;
} avbuf;
struct {
void __iomem *base;
struct clk *clk;
bool clk_from_ps;
} audio;
struct zynqmp_disp_layer layers[ZYNQMP_DISP_NUM_LAYERS];
@ -423,15 +405,14 @@ static const struct zynqmp_disp_format avbuf_gfx_fmts[] = {
},
};
static u32 zynqmp_disp_avbuf_read(struct zynqmp_disp_avbuf *avbuf, int reg)
static u32 zynqmp_disp_avbuf_read(struct zynqmp_disp *disp, int reg)
{
return readl(avbuf->base + reg);
return readl(disp->avbuf.base + reg);
}
static void zynqmp_disp_avbuf_write(struct zynqmp_disp_avbuf *avbuf,
int reg, u32 val)
static void zynqmp_disp_avbuf_write(struct zynqmp_disp *disp, int reg, u32 val)
{
writel(val, avbuf->base + reg);
writel(val, disp->avbuf.base + reg);
}
static bool zynqmp_disp_layer_is_video(const struct zynqmp_disp_layer *layer)
@ -441,38 +422,38 @@ static bool zynqmp_disp_layer_is_video(const struct zynqmp_disp_layer *layer)
/**
* zynqmp_disp_avbuf_set_format - Set the input format for a layer
* @avbuf: Audio/video buffer manager
* @disp: Display controller
* @layer: The layer
* @fmt: The format information
*
* Set the video buffer manager format for @layer to @fmt.
*/
static void zynqmp_disp_avbuf_set_format(struct zynqmp_disp_avbuf *avbuf,
static void zynqmp_disp_avbuf_set_format(struct zynqmp_disp *disp,
struct zynqmp_disp_layer *layer,
const struct zynqmp_disp_format *fmt)
{
unsigned int i;
u32 val;
val = zynqmp_disp_avbuf_read(avbuf, ZYNQMP_DISP_AV_BUF_FMT);
val = zynqmp_disp_avbuf_read(disp, ZYNQMP_DISP_AV_BUF_FMT);
val &= zynqmp_disp_layer_is_video(layer)
? ~ZYNQMP_DISP_AV_BUF_FMT_NL_VID_MASK
: ~ZYNQMP_DISP_AV_BUF_FMT_NL_GFX_MASK;
val |= fmt->buf_fmt;
zynqmp_disp_avbuf_write(avbuf, ZYNQMP_DISP_AV_BUF_FMT, val);
zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_FMT, val);
for (i = 0; i < ZYNQMP_DISP_AV_BUF_NUM_SF; i++) {
unsigned int reg = zynqmp_disp_layer_is_video(layer)
? ZYNQMP_DISP_AV_BUF_VID_COMP_SF(i)
: ZYNQMP_DISP_AV_BUF_GFX_COMP_SF(i);
zynqmp_disp_avbuf_write(avbuf, reg, fmt->sf[i]);
zynqmp_disp_avbuf_write(disp, reg, fmt->sf[i]);
}
}
/**
* zynqmp_disp_avbuf_set_clocks_sources - Set the clocks sources
* @avbuf: Audio/video buffer manager
* @disp: Display controller
* @video_from_ps: True if the video clock originates from the PS
* @audio_from_ps: True if the audio clock originates from the PS
* @timings_internal: True if video timings are generated internally
@ -482,7 +463,7 @@ static void zynqmp_disp_avbuf_set_format(struct zynqmp_disp_avbuf *avbuf,
* generated internally or externally.
*/
static void
zynqmp_disp_avbuf_set_clocks_sources(struct zynqmp_disp_avbuf *avbuf,
zynqmp_disp_avbuf_set_clocks_sources(struct zynqmp_disp *disp,
bool video_from_ps, bool audio_from_ps,
bool timings_internal)
{
@ -495,16 +476,16 @@ zynqmp_disp_avbuf_set_clocks_sources(struct zynqmp_disp_avbuf *avbuf,
if (timings_internal)
val |= ZYNQMP_DISP_AV_BUF_CLK_SRC_VID_INTERNAL_TIMING;
zynqmp_disp_avbuf_write(avbuf, ZYNQMP_DISP_AV_BUF_CLK_SRC, val);
zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_CLK_SRC, val);
}
/**
* zynqmp_disp_avbuf_enable_channels - Enable buffer channels
* @avbuf: Audio/video buffer manager
* @disp: Display controller
*
* Enable all (video and audio) buffer channels.
*/
static void zynqmp_disp_avbuf_enable_channels(struct zynqmp_disp_avbuf *avbuf)
static void zynqmp_disp_avbuf_enable_channels(struct zynqmp_disp *disp)
{
unsigned int i;
u32 val;
@ -514,7 +495,7 @@ static void zynqmp_disp_avbuf_enable_channels(struct zynqmp_disp_avbuf *avbuf)
ZYNQMP_DISP_AV_BUF_CHBUF_BURST_LEN_SHIFT);
for (i = 0; i < ZYNQMP_DISP_AV_BUF_NUM_VID_GFX_BUFFERS; i++)
zynqmp_disp_avbuf_write(avbuf, ZYNQMP_DISP_AV_BUF_CHBUF(i),
zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_CHBUF(i),
val);
val = ZYNQMP_DISP_AV_BUF_CHBUF_EN |
@ -522,74 +503,74 @@ static void zynqmp_disp_avbuf_enable_channels(struct zynqmp_disp_avbuf *avbuf)
ZYNQMP_DISP_AV_BUF_CHBUF_BURST_LEN_SHIFT);
for (; i < ZYNQMP_DISP_AV_BUF_NUM_BUFFERS; i++)
zynqmp_disp_avbuf_write(avbuf, ZYNQMP_DISP_AV_BUF_CHBUF(i),
zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_CHBUF(i),
val);
}
/**
* zynqmp_disp_avbuf_disable_channels - Disable buffer channels
* @avbuf: Audio/video buffer manager
* @disp: Display controller
*
* Disable all (video and audio) buffer channels.
*/
static void zynqmp_disp_avbuf_disable_channels(struct zynqmp_disp_avbuf *avbuf)
static void zynqmp_disp_avbuf_disable_channels(struct zynqmp_disp *disp)
{
unsigned int i;
for (i = 0; i < ZYNQMP_DISP_AV_BUF_NUM_BUFFERS; i++)
zynqmp_disp_avbuf_write(avbuf, ZYNQMP_DISP_AV_BUF_CHBUF(i),
zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_CHBUF(i),
ZYNQMP_DISP_AV_BUF_CHBUF_FLUSH);
}
/**
* zynqmp_disp_avbuf_enable_audio - Enable audio
* @avbuf: Audio/video buffer manager
* @disp: Display controller
*
* Enable all audio buffers with a non-live (memory) source.
*/
static void zynqmp_disp_avbuf_enable_audio(struct zynqmp_disp_avbuf *avbuf)
static void zynqmp_disp_avbuf_enable_audio(struct zynqmp_disp *disp)
{
u32 val;
val = zynqmp_disp_avbuf_read(avbuf, ZYNQMP_DISP_AV_BUF_OUTPUT);
val = zynqmp_disp_avbuf_read(disp, ZYNQMP_DISP_AV_BUF_OUTPUT);
val &= ~ZYNQMP_DISP_AV_BUF_OUTPUT_AUD1_MASK;
val |= ZYNQMP_DISP_AV_BUF_OUTPUT_AUD1_MEM;
val |= ZYNQMP_DISP_AV_BUF_OUTPUT_AUD2_EN;
zynqmp_disp_avbuf_write(avbuf, ZYNQMP_DISP_AV_BUF_OUTPUT, val);
zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_OUTPUT, val);
}
/**
* zynqmp_disp_avbuf_disable_audio - Disable audio
* @avbuf: Audio/video buffer manager
* @disp: Display controller
*
* Disable all audio buffers.
*/
static void zynqmp_disp_avbuf_disable_audio(struct zynqmp_disp_avbuf *avbuf)
static void zynqmp_disp_avbuf_disable_audio(struct zynqmp_disp *disp)
{
u32 val;
val = zynqmp_disp_avbuf_read(avbuf, ZYNQMP_DISP_AV_BUF_OUTPUT);
val = zynqmp_disp_avbuf_read(disp, ZYNQMP_DISP_AV_BUF_OUTPUT);
val &= ~ZYNQMP_DISP_AV_BUF_OUTPUT_AUD1_MASK;
val |= ZYNQMP_DISP_AV_BUF_OUTPUT_AUD1_DISABLE;
val &= ~ZYNQMP_DISP_AV_BUF_OUTPUT_AUD2_EN;
zynqmp_disp_avbuf_write(avbuf, ZYNQMP_DISP_AV_BUF_OUTPUT, val);
zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_OUTPUT, val);
}
/**
* zynqmp_disp_avbuf_enable_video - Enable a video layer
* @avbuf: Audio/video buffer manager
* @disp: Display controller
* @layer: The layer
* @mode: Operating mode of layer
*
* Enable the video/graphics buffer for @layer.
*/
static void zynqmp_disp_avbuf_enable_video(struct zynqmp_disp_avbuf *avbuf,
static void zynqmp_disp_avbuf_enable_video(struct zynqmp_disp *disp,
struct zynqmp_disp_layer *layer,
enum zynqmp_disp_layer_mode mode)
{
u32 val;
val = zynqmp_disp_avbuf_read(avbuf, ZYNQMP_DISP_AV_BUF_OUTPUT);
val = zynqmp_disp_avbuf_read(disp, ZYNQMP_DISP_AV_BUF_OUTPUT);
if (zynqmp_disp_layer_is_video(layer)) {
val &= ~ZYNQMP_DISP_AV_BUF_OUTPUT_VID1_MASK;
if (mode == ZYNQMP_DISP_LAYER_NONLIVE)
@ -604,22 +585,22 @@ static void zynqmp_disp_avbuf_enable_video(struct zynqmp_disp_avbuf *avbuf,
else
val |= ZYNQMP_DISP_AV_BUF_OUTPUT_VID2_LIVE;
}
zynqmp_disp_avbuf_write(avbuf, ZYNQMP_DISP_AV_BUF_OUTPUT, val);
zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_OUTPUT, val);
}
/**
* zynqmp_disp_avbuf_disable_video - Disable a video layer
* @avbuf: Audio/video buffer manager
* @disp: Display controller
* @layer: The layer
*
* Disable the video/graphics buffer for @layer.
*/
static void zynqmp_disp_avbuf_disable_video(struct zynqmp_disp_avbuf *avbuf,
static void zynqmp_disp_avbuf_disable_video(struct zynqmp_disp *disp,
struct zynqmp_disp_layer *layer)
{
u32 val;
val = zynqmp_disp_avbuf_read(avbuf, ZYNQMP_DISP_AV_BUF_OUTPUT);
val = zynqmp_disp_avbuf_read(disp, ZYNQMP_DISP_AV_BUF_OUTPUT);
if (zynqmp_disp_layer_is_video(layer)) {
val &= ~ZYNQMP_DISP_AV_BUF_OUTPUT_VID1_MASK;
val |= ZYNQMP_DISP_AV_BUF_OUTPUT_VID1_NONE;
@ -627,29 +608,29 @@ static void zynqmp_disp_avbuf_disable_video(struct zynqmp_disp_avbuf *avbuf,
val &= ~ZYNQMP_DISP_AV_BUF_OUTPUT_VID2_MASK;
val |= ZYNQMP_DISP_AV_BUF_OUTPUT_VID2_DISABLE;
}
zynqmp_disp_avbuf_write(avbuf, ZYNQMP_DISP_AV_BUF_OUTPUT, val);
zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_OUTPUT, val);
}
/**
* zynqmp_disp_avbuf_enable - Enable the video pipe
* @avbuf: Audio/video buffer manager
* @disp: Display controller
*
* De-assert the video pipe reset.
*/
static void zynqmp_disp_avbuf_enable(struct zynqmp_disp_avbuf *avbuf)
static void zynqmp_disp_avbuf_enable(struct zynqmp_disp *disp)
{
zynqmp_disp_avbuf_write(avbuf, ZYNQMP_DISP_AV_BUF_SRST_REG, 0);
zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_SRST_REG, 0);
}
/**
* zynqmp_disp_avbuf_disable - Disable the video pipe
* @avbuf: Audio/video buffer manager
* @disp: Display controller
*
* Assert the video pipe reset.
*/
static void zynqmp_disp_avbuf_disable(struct zynqmp_disp_avbuf *avbuf)
static void zynqmp_disp_avbuf_disable(struct zynqmp_disp *disp)
{
zynqmp_disp_avbuf_write(avbuf, ZYNQMP_DISP_AV_BUF_SRST_REG,
zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_SRST_REG,
ZYNQMP_DISP_AV_BUF_SRST_REG_VID_RST);
}
@ -657,10 +638,9 @@ static void zynqmp_disp_avbuf_disable(struct zynqmp_disp_avbuf *avbuf)
* Blender (Video Pipeline)
*/
static void zynqmp_disp_blend_write(struct zynqmp_disp_blend *blend,
int reg, u32 val)
static void zynqmp_disp_blend_write(struct zynqmp_disp *disp, int reg, u32 val)
{
writel(val, blend->base + reg);
writel(val, disp->blend.base + reg);
}
/*
@ -706,12 +686,12 @@ static const u32 csc_sdtv_to_rgb_offsets[] = {
/**
* zynqmp_disp_blend_set_output_format - Set the output format of the blender
* @blend: Blender object
* @disp: Display controller
* @format: Output format
*
* Set the output format of the blender to @format.
*/
static void zynqmp_disp_blend_set_output_format(struct zynqmp_disp_blend *blend,
static void zynqmp_disp_blend_set_output_format(struct zynqmp_disp *disp,
enum zynqmp_dpsub_format format)
{
static const unsigned int blend_output_fmts[] = {
@ -727,7 +707,7 @@ static void zynqmp_disp_blend_set_output_format(struct zynqmp_disp_blend *blend,
const u32 *offsets;
unsigned int i;
zynqmp_disp_blend_write(blend, ZYNQMP_DISP_V_BLEND_OUTPUT_VID_FMT, fmt);
zynqmp_disp_blend_write(disp, ZYNQMP_DISP_V_BLEND_OUTPUT_VID_FMT, fmt);
if (fmt == ZYNQMP_DISP_V_BLEND_OUTPUT_VID_FMT_RGB) {
coeffs = csc_identity_matrix;
offsets = csc_zero_offsets;
@ -737,19 +717,19 @@ static void zynqmp_disp_blend_set_output_format(struct zynqmp_disp_blend *blend,
}
for (i = 0; i < ZYNQMP_DISP_V_BLEND_NUM_COEFF; i++)
zynqmp_disp_blend_write(blend,
zynqmp_disp_blend_write(disp,
ZYNQMP_DISP_V_BLEND_RGB2YCBCR_COEFF(i),
coeffs[i]);
for (i = 0; i < ZYNQMP_DISP_V_BLEND_NUM_OFFSET; i++)
zynqmp_disp_blend_write(blend,
zynqmp_disp_blend_write(disp,
ZYNQMP_DISP_V_BLEND_OUTCSC_OFFSET(i),
offsets[i]);
}
/**
* zynqmp_disp_blend_set_bg_color - Set the background color
* @blend: Blender object
* @disp: Display controller
* @rcr: Red/Cr color component
* @gy: Green/Y color component
* @bcb: Blue/Cb color component
@ -758,31 +738,31 @@ static void zynqmp_disp_blend_set_output_format(struct zynqmp_disp_blend *blend,
* B or Cr, Y and Cb components respectively depending on the selected output
* format.
*/
static void zynqmp_disp_blend_set_bg_color(struct zynqmp_disp_blend *blend,
static void zynqmp_disp_blend_set_bg_color(struct zynqmp_disp *disp,
u32 rcr, u32 gy, u32 bcb)
{
zynqmp_disp_blend_write(blend, ZYNQMP_DISP_V_BLEND_BG_CLR_0, rcr);
zynqmp_disp_blend_write(blend, ZYNQMP_DISP_V_BLEND_BG_CLR_1, gy);
zynqmp_disp_blend_write(blend, ZYNQMP_DISP_V_BLEND_BG_CLR_2, bcb);
zynqmp_disp_blend_write(disp, ZYNQMP_DISP_V_BLEND_BG_CLR_0, rcr);
zynqmp_disp_blend_write(disp, ZYNQMP_DISP_V_BLEND_BG_CLR_1, gy);
zynqmp_disp_blend_write(disp, ZYNQMP_DISP_V_BLEND_BG_CLR_2, bcb);
}
/**
* zynqmp_disp_blend_set_global_alpha - Configure global alpha blending
* @blend: Blender object
* @disp: Display controller
* @enable: True to enable global alpha blending
* @alpha: Global alpha value (ignored if @enabled is false)
*/
static void zynqmp_disp_blend_set_global_alpha(struct zynqmp_disp_blend *blend,
static void zynqmp_disp_blend_set_global_alpha(struct zynqmp_disp *disp,
bool enable, u32 alpha)
{
zynqmp_disp_blend_write(blend, ZYNQMP_DISP_V_BLEND_SET_GLOBAL_ALPHA,
zynqmp_disp_blend_write(disp, ZYNQMP_DISP_V_BLEND_SET_GLOBAL_ALPHA,
ZYNQMP_DISP_V_BLEND_SET_GLOBAL_ALPHA_VALUE(alpha) |
(enable ? ZYNQMP_DISP_V_BLEND_SET_GLOBAL_ALPHA_EN : 0));
}
/**
* zynqmp_disp_blend_layer_set_csc - Configure colorspace conversion for layer
* @blend: Blender object
* @disp: Display controller
* @layer: The layer
* @coeffs: Colorspace conversion matrix
* @offsets: Colorspace conversion offsets
@ -791,7 +771,7 @@ static void zynqmp_disp_blend_set_global_alpha(struct zynqmp_disp_blend *blend,
* Columns of the matrix are automatically swapped based on the input format to
* handle RGB and YCrCb components permutations.
*/
static void zynqmp_disp_blend_layer_set_csc(struct zynqmp_disp_blend *blend,
static void zynqmp_disp_blend_layer_set_csc(struct zynqmp_disp *disp,
struct zynqmp_disp_layer *layer,
const u16 *coeffs,
const u32 *offsets)
@ -818,9 +798,9 @@ static void zynqmp_disp_blend_layer_set_csc(struct zynqmp_disp_blend *blend,
reg = ZYNQMP_DISP_V_BLEND_IN2CSC_COEFF(0);
for (i = 0; i < ZYNQMP_DISP_V_BLEND_NUM_COEFF; i += 3, reg += 12) {
zynqmp_disp_blend_write(blend, reg + 0, coeffs[i + swap[0]]);
zynqmp_disp_blend_write(blend, reg + 4, coeffs[i + swap[1]]);
zynqmp_disp_blend_write(blend, reg + 8, coeffs[i + swap[2]]);
zynqmp_disp_blend_write(disp, reg + 0, coeffs[i + swap[0]]);
zynqmp_disp_blend_write(disp, reg + 4, coeffs[i + swap[1]]);
zynqmp_disp_blend_write(disp, reg + 8, coeffs[i + swap[2]]);
}
if (zynqmp_disp_layer_is_video(layer))
@ -829,15 +809,15 @@ static void zynqmp_disp_blend_layer_set_csc(struct zynqmp_disp_blend *blend,
reg = ZYNQMP_DISP_V_BLEND_IN2CSC_OFFSET(0);
for (i = 0; i < ZYNQMP_DISP_V_BLEND_NUM_OFFSET; i++)
zynqmp_disp_blend_write(blend, reg + i * 4, offsets[i]);
zynqmp_disp_blend_write(disp, reg + i * 4, offsets[i]);
}
/**
* zynqmp_disp_blend_layer_enable - Enable a layer
* @blend: Blender object
* @disp: Display controller
* @layer: The layer
*/
static void zynqmp_disp_blend_layer_enable(struct zynqmp_disp_blend *blend,
static void zynqmp_disp_blend_layer_enable(struct zynqmp_disp *disp,
struct zynqmp_disp_layer *layer)
{
const u16 *coeffs;
@ -849,7 +829,7 @@ static void zynqmp_disp_blend_layer_enable(struct zynqmp_disp_blend *blend,
(layer->drm_fmt->hsub > 1 ?
ZYNQMP_DISP_V_BLEND_LAYER_CONTROL_EN_US : 0);
zynqmp_disp_blend_write(blend,
zynqmp_disp_blend_write(disp,
ZYNQMP_DISP_V_BLEND_LAYER_CONTROL(layer->id),
val);
@ -861,22 +841,22 @@ static void zynqmp_disp_blend_layer_enable(struct zynqmp_disp_blend *blend,
offsets = csc_zero_offsets;
}
zynqmp_disp_blend_layer_set_csc(blend, layer, coeffs, offsets);
zynqmp_disp_blend_layer_set_csc(disp, layer, coeffs, offsets);
}
/**
* zynqmp_disp_blend_layer_disable - Disable a layer
* @blend: Blender object
* @disp: Display controller
* @layer: The layer
*/
static void zynqmp_disp_blend_layer_disable(struct zynqmp_disp_blend *blend,
static void zynqmp_disp_blend_layer_disable(struct zynqmp_disp *disp,
struct zynqmp_disp_layer *layer)
{
zynqmp_disp_blend_write(blend,
zynqmp_disp_blend_write(disp,
ZYNQMP_DISP_V_BLEND_LAYER_CONTROL(layer->id),
0);
zynqmp_disp_blend_layer_set_csc(blend, layer, csc_zero_matrix,
zynqmp_disp_blend_layer_set_csc(disp, layer, csc_zero_matrix,
csc_zero_offsets);
}
@ -884,57 +864,55 @@ static void zynqmp_disp_blend_layer_disable(struct zynqmp_disp_blend *blend,
* Audio Mixer
*/
static void zynqmp_disp_audio_write(struct zynqmp_disp_audio *audio,
int reg, u32 val)
static void zynqmp_disp_audio_write(struct zynqmp_disp *disp, int reg, u32 val)
{
writel(val, audio->base + reg);
writel(val, disp->audio.base + reg);
}
/**
* zynqmp_disp_audio_enable - Enable the audio mixer
* @audio: Audio mixer
* @disp: Display controller
*
* Enable the audio mixer by de-asserting the soft reset. The audio state is set to
* default values by the reset, set the default mixer volume explicitly.
*/
static void zynqmp_disp_audio_enable(struct zynqmp_disp_audio *audio)
static void zynqmp_disp_audio_enable(struct zynqmp_disp *disp)
{
/* Clear the audio soft reset register as it's an non-reset flop. */
zynqmp_disp_audio_write(audio, ZYNQMP_DISP_AUD_SOFT_RESET, 0);
zynqmp_disp_audio_write(audio, ZYNQMP_DISP_AUD_MIXER_VOLUME,
zynqmp_disp_audio_write(disp, ZYNQMP_DISP_AUD_SOFT_RESET, 0);
zynqmp_disp_audio_write(disp, ZYNQMP_DISP_AUD_MIXER_VOLUME,
ZYNQMP_DISP_AUD_MIXER_VOLUME_NO_SCALE);
}
/**
* zynqmp_disp_audio_disable - Disable the audio mixer
* @audio: Audio mixer
* @disp: Display controller
*
* Disable the audio mixer by asserting its soft reset.
*/
static void zynqmp_disp_audio_disable(struct zynqmp_disp_audio *audio)
static void zynqmp_disp_audio_disable(struct zynqmp_disp *disp)
{
zynqmp_disp_audio_write(audio, ZYNQMP_DISP_AUD_SOFT_RESET,
zynqmp_disp_audio_write(disp, ZYNQMP_DISP_AUD_SOFT_RESET,
ZYNQMP_DISP_AUD_SOFT_RESET_AUD_SRST);
}
static void zynqmp_disp_audio_init(struct device *dev,
struct zynqmp_disp_audio *audio)
static void zynqmp_disp_audio_init(struct zynqmp_disp *disp)
{
/* Try the live PL audio clock. */
audio->clk = devm_clk_get(dev, "dp_live_audio_aclk");
if (!IS_ERR(audio->clk)) {
audio->clk_from_ps = false;
disp->audio.clk = devm_clk_get(disp->dev, "dp_live_audio_aclk");
if (!IS_ERR(disp->audio.clk)) {
disp->audio.clk_from_ps = false;
return;
}
/* If the live PL audio clock is not valid, fall back to PS clock. */
audio->clk = devm_clk_get(dev, "dp_aud_clk");
if (!IS_ERR(audio->clk)) {
audio->clk_from_ps = true;
disp->audio.clk = devm_clk_get(disp->dev, "dp_aud_clk");
if (!IS_ERR(disp->audio.clk)) {
disp->audio.clk_from_ps = true;
return;
}
dev_err(dev, "audio disabled due to missing clock\n");
dev_err(disp->dev, "audio disabled due to missing clock\n");
}
/* -----------------------------------------------------------------------------
@ -1030,9 +1008,9 @@ zynqmp_disp_layer_find_format(struct zynqmp_disp_layer *layer,
*/
static void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer)
{
zynqmp_disp_avbuf_enable_video(&layer->disp->avbuf, layer,
zynqmp_disp_avbuf_enable_video(layer->disp, layer,
ZYNQMP_DISP_LAYER_NONLIVE);
zynqmp_disp_blend_layer_enable(&layer->disp->blend, layer);
zynqmp_disp_blend_layer_enable(layer->disp, layer);
layer->mode = ZYNQMP_DISP_LAYER_NONLIVE;
}
@ -1051,8 +1029,8 @@ static void zynqmp_disp_layer_disable(struct zynqmp_disp_layer *layer)
for (i = 0; i < layer->drm_fmt->num_planes; i++)
dmaengine_terminate_sync(layer->dmas[i].chan);
zynqmp_disp_avbuf_disable_video(&layer->disp->avbuf, layer);
zynqmp_disp_blend_layer_disable(&layer->disp->blend, layer);
zynqmp_disp_avbuf_disable_video(layer->disp, layer);
zynqmp_disp_blend_layer_disable(layer->disp, layer);
}
/**
@ -1072,8 +1050,7 @@ static void zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer,
layer->disp_fmt = zynqmp_disp_layer_find_format(layer, info->format);
layer->drm_fmt = info;
zynqmp_disp_avbuf_set_format(&layer->disp->avbuf, layer,
layer->disp_fmt);
zynqmp_disp_avbuf_set_format(layer->disp, layer, layer->disp_fmt);
/*
* Set slave_id for each DMA channel to indicate they're part of a
@ -1392,14 +1369,14 @@ err:
*/
static void zynqmp_disp_enable(struct zynqmp_disp *disp)
{
zynqmp_disp_avbuf_enable(&disp->avbuf);
zynqmp_disp_avbuf_enable(disp);
/* Choose clock source based on the DT clock handle. */
zynqmp_disp_avbuf_set_clocks_sources(&disp->avbuf, disp->pclk_from_ps,
zynqmp_disp_avbuf_set_clocks_sources(disp, disp->pclk_from_ps,
disp->audio.clk_from_ps, true);
zynqmp_disp_avbuf_enable_channels(&disp->avbuf);
zynqmp_disp_avbuf_enable_audio(&disp->avbuf);
zynqmp_disp_avbuf_enable_channels(disp);
zynqmp_disp_avbuf_enable_audio(disp);
zynqmp_disp_audio_enable(&disp->audio);
zynqmp_disp_audio_enable(disp);
}
/**
@ -1408,11 +1385,11 @@ static void zynqmp_disp_enable(struct zynqmp_disp *disp)
*/
static void zynqmp_disp_disable(struct zynqmp_disp *disp)
{
zynqmp_disp_audio_disable(&disp->audio);
zynqmp_disp_audio_disable(disp);
zynqmp_disp_avbuf_disable_audio(&disp->avbuf);
zynqmp_disp_avbuf_disable_channels(&disp->avbuf);
zynqmp_disp_avbuf_disable(&disp->avbuf);
zynqmp_disp_avbuf_disable_audio(disp);
zynqmp_disp_avbuf_disable_channels(disp);
zynqmp_disp_avbuf_disable(disp);
}
static inline struct zynqmp_disp *crtc_to_disp(struct drm_crtc *crtc)
@ -1468,10 +1445,9 @@ zynqmp_disp_crtc_atomic_enable(struct drm_crtc *crtc,
return;
}
zynqmp_disp_blend_set_output_format(&disp->blend,
ZYNQMP_DPSUB_FORMAT_RGB);
zynqmp_disp_blend_set_bg_color(&disp->blend, 0, 0, 0);
zynqmp_disp_blend_set_global_alpha(&disp->blend, false, 0);
zynqmp_disp_blend_set_output_format(disp, ZYNQMP_DPSUB_FORMAT_RGB);
zynqmp_disp_blend_set_bg_color(disp, 0, 0, 0);
zynqmp_disp_blend_set_global_alpha(disp, false, 0);
zynqmp_disp_enable(disp);
@ -1680,7 +1656,7 @@ int zynqmp_disp_probe(struct zynqmp_dpsub *dpsub, struct drm_device *drm)
disp->pclk_from_ps = true;
}
zynqmp_disp_audio_init(disp->dev, &disp->audio);
zynqmp_disp_audio_init(disp);
ret = zynqmp_disp_create_layers(disp);
if (ret)