drivers/watchdog: ASPEED reference dev tree properties for config
Reference the system device tree when configuring the watchdog engines. If property 'aspeed,reset_type' is present then set reset behavior based on the specified value. This can be one of three different mutually exclusive values * cpu - Reset CPU only on watchdog timeout * soc - Reset System on Chip * system - Full system reset No reset can also be specified by indicating: * none - No reset, assumes another watchdog is responsible for this. Add optional property 'aspeed,external-signal'. If present then configure to generate external signal on watchdog timeout. Signed-off-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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@ -36,6 +36,7 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table);
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#define WDT_CTRL 0x0C
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#define WDT_CTRL_RESET_MODE_SOC (0x00 << 5)
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#define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5)
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#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5)
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#define WDT_CTRL_1MHZ_CLK BIT(4)
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#define WDT_CTRL_WDT_EXT BIT(3)
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#define WDT_CTRL_WDT_INTR BIT(2)
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@ -140,6 +141,8 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
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{
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struct aspeed_wdt *wdt;
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struct resource *res;
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struct device_node *np;
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const char *reset_type;
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int ret;
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wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
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@ -164,14 +167,30 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
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wdt->wdd.timeout = WDT_DEFAULT_TIMEOUT;
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watchdog_init_timeout(&wdt->wdd, 0, &pdev->dev);
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wdt->ctrl = WDT_CTRL_1MHZ_CLK;
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/*
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* Control reset on a per-device basis to ensure the
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* host is not affected by a BMC reboot, so only reset
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* the SOC and not the full chip
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* host is not affected by a BMC reboot
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*/
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wdt->ctrl = WDT_CTRL_RESET_MODE_SOC |
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WDT_CTRL_1MHZ_CLK |
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WDT_CTRL_RESET_SYSTEM;
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np = pdev->dev.of_node;
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ret = of_property_read_string(np, "aspeed,reset-type", &reset_type);
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if (ret) {
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wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC | WDT_CTRL_RESET_SYSTEM;
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} else {
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if (!strcmp(reset_type, "cpu"))
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wdt->ctrl |= WDT_CTRL_RESET_MODE_ARM_CPU;
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else if (!strcmp(reset_type, "soc"))
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wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC;
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else if (!strcmp(reset_type, "system"))
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wdt->ctrl |= WDT_CTRL_RESET_SYSTEM;
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else if (strcmp(reset_type, "none"))
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return -EINVAL;
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}
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if (of_property_read_bool(np, "aspeed,external-signal"))
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wdt->ctrl |= WDT_CTRL_WDT_EXT;
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writel(wdt->ctrl, wdt->base + WDT_CTRL);
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if (readl(wdt->base + WDT_CTRL) & WDT_CTRL_ENABLE) {
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aspeed_wdt_start(&wdt->wdd);
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