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arm64: dts: mt8183: Add gce client reg for display subcomponents 

Add mediatek,gce-client-reg for mmsys, ccorr, aal, gamma, dither.

Fixes: 91f9c963ce ("arm64: dts: mt8183: Add display nodes for MT8183")
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210324070842.1037233-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Hsin-Yi Wang 2021-03-24 15:08:42 +08:00 committed by Matthias Brugger
parent d1c9c70a88
commit b7a8f50a14
1 changed files with 7 additions and 0 deletions
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7
arch/arm64/boot/dts/mediatek/mt8183.dtsi
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@ -981,6 +981,9 @@
compatible = "mediatek,mt8183-mmsys", "syscon";
reg = <0 0x14000000 0 0x1000>;
#clock-cells = <1>;
mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
<&gce 1 CMDQ_THR_PRIO_HIGHEST>;
mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
};
ovl0: ovl@14008000 {
@ -1056,6 +1059,7 @@
interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
clocks = <&mmsys CLK_MM_DISP_CCORR0>;
mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>;
};
aal0: aal@14010000 {
@ -1065,6 +1069,7 @@
interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
clocks = <&mmsys CLK_MM_DISP_AAL0>;
mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0 0x1000>;
};
gamma0: gamma@14011000 {
@ -1073,6 +1078,7 @@
interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
clocks = <&mmsys CLK_MM_DISP_GAMMA0>;
mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>;
};
dither0: dither@14012000 {
@ -1081,6 +1087,7 @@
interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
clocks = <&mmsys CLK_MM_DISP_DITHER0>;
mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>;
};
dsi0: dsi@14014000 {