[MTD] [NAND] add s3c2440-specific read_buf/write_buf
Add read_buf/write_buf for s3c2440, which can read/write 32 bits at a time rather than just 8. In my testing on an s3c2440a running at 400 MHz with a 100 MHz HCLK, read performance improves by 36% (from 5.19 MB/s to 7.07 MB/s). Signed-off-by: Matt Reimer <mreimer@vpop.net> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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@ -488,12 +488,24 @@ static void s3c2410_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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readsb(this->IO_ADDR_R, buf, len);
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}
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static void s3c2440_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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{
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struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
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readsl(info->regs + S3C2440_NFDATA, buf, len / 4);
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}
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static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
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{
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struct nand_chip *this = mtd->priv;
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writesb(this->IO_ADDR_W, buf, len);
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}
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static void s3c2440_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
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{
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struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
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writesl(info->regs + S3C2440_NFDATA, buf, len / 4);
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}
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/* device management functions */
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static int s3c2410_nand_remove(struct platform_device *pdev)
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@ -604,6 +616,8 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
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info->sel_bit = S3C2440_NFCONT_nFCE;
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chip->cmd_ctrl = s3c2440_nand_hwcontrol;
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chip->dev_ready = s3c2440_nand_devready;
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chip->read_buf = s3c2440_nand_read_buf;
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chip->write_buf = s3c2440_nand_write_buf;
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break;
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case TYPE_S3C2412:
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