dt-bindings: iio: adc: qcom,spmi-adc7: use predefined channel ids
Each of qcom,spmi-adc7-pm*.h headers define a set of ADC channels that can be used for monitoring on thie particular chip. Switch them to use channel IDs defined in the dt-bindings/iio/qcom,spmi-vadc.h header instead of specifying the numeric IDs. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230707123027.1510723-2-dmitry.baryshkov@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Dmitry Baryshkov
Jonathan Cameron
parent
6c7bc1d27b
commit
b7297d4566
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@ -6,58 +6,60 @@
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#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
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#define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
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/* ADC channels for PM8350_ADC for PMIC7 */
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#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | 0x0)
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#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | 0x01)
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#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | 0x02)
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#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | 0x03)
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#include <dt-bindings/iio/qcom,spmi-vadc.h>
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#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | 0x04)
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#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | 0x05)
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#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | 0x06)
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#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | 0x07)
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#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | 0x08)
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#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | 0x0a)
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#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | 0x0b)
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#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | 0x0c)
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#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | 0x0d)
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/* ADC channels for PM8350_ADC for PMIC7 */
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#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | ADC7_REF_GND)
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#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | ADC7_1P25VREF)
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#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | ADC7_VREF_VADC)
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#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | ADC7_DIE_TEMP)
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#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | ADC7_AMUX_THM1)
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#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | ADC7_AMUX_THM2)
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#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | ADC7_AMUX_THM3)
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#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | ADC7_AMUX_THM4)
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#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | ADC7_AMUX_THM5)
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#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | ADC7_GPIO1)
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#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | ADC7_GPIO2)
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#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | ADC7_GPIO3)
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#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | ADC7_GPIO4)
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/* 30k pull-up1 */
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#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | 0x24)
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#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | 0x25)
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#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | 0x26)
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#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | 0x27)
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#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | 0x28)
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#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | 0x2a)
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#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | 0x2b)
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#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | 0x2c)
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#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | 0x2d)
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#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_30K_PU)
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#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_30K_PU)
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#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_30K_PU)
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#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_30K_PU)
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#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_30K_PU)
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#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | ADC7_GPIO1_30K_PU)
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#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | ADC7_GPIO2_30K_PU)
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#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | ADC7_GPIO3_30K_PU)
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#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | ADC7_GPIO4_30K_PU)
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/* 100k pull-up2 */
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#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | 0x44)
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#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | 0x45)
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#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | 0x46)
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#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | 0x47)
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#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | 0x48)
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#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | 0x4a)
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#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | 0x4b)
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#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | 0x4c)
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#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | 0x4d)
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#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_100K_PU)
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#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_100K_PU)
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#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_100K_PU)
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#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_100K_PU)
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#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_100K_PU)
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#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | ADC7_GPIO1_100K_PU)
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#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | ADC7_GPIO2_100K_PU)
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#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | ADC7_GPIO3_100K_PU)
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#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | ADC7_GPIO4_100K_PU)
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/* 400k pull-up3 */
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#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | 0x64)
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#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | 0x65)
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#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | 0x66)
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#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | 0x67)
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#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | 0x68)
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#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | 0x6a)
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#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | 0x6b)
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#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | 0x6c)
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#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | 0x6d)
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#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_400K_PU)
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#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_400K_PU)
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#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_400K_PU)
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#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_400K_PU)
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#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_400K_PU)
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#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | ADC7_GPIO1_400K_PU)
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#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | ADC7_GPIO2_400K_PU)
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#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | ADC7_GPIO3_400K_PU)
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#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | ADC7_GPIO4_400K_PU)
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/* 1/3 Divider */
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#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | 0x8d)
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#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | ADC7_GPIO4_DIV3)
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#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | 0x8e)
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#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | ADC7_VPH_PWR)
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#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */
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@ -10,79 +10,81 @@
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#define PM8350B_SID 3
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#endif
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#include <dt-bindings/iio/qcom,spmi-vadc.h>
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/* ADC channels for PM8350B_ADC for PMIC7 */
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#define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | 0x0)
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#define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | 0x01)
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#define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | 0x02)
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#define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | 0x03)
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#define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | ADC7_REF_GND)
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#define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | ADC7_1P25VREF)
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#define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | ADC7_VREF_VADC)
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#define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | ADC7_DIE_TEMP)
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#define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | 0x04)
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#define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | 0x05)
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#define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | 0x06)
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#define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | 0x07)
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#define PM8350B_ADC7_AMUX_THM5 (PM8350B_SID << 8 | 0x08)
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#define PM8350B_ADC7_AMUX_THM6 (PM8350B_SID << 8 | 0x09)
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#define PM8350B_ADC7_GPIO1 (PM8350B_SID << 8 | 0x0a)
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#define PM8350B_ADC7_GPIO2 (PM8350B_SID << 8 | 0x0b)
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#define PM8350B_ADC7_GPIO3 (PM8350B_SID << 8 | 0x0c)
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#define PM8350B_ADC7_GPIO4 (PM8350B_SID << 8 | 0x0d)
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#define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | ADC7_AMUX_THM1)
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#define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | ADC7_AMUX_THM2)
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#define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | ADC7_AMUX_THM3)
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#define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | ADC7_AMUX_THM4)
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#define PM8350B_ADC7_AMUX_THM5 (PM8350B_SID << 8 | ADC7_AMUX_THM5)
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#define PM8350B_ADC7_AMUX_THM6 (PM8350B_SID << 8 | ADC7_AMUX_THM6)
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#define PM8350B_ADC7_GPIO1 (PM8350B_SID << 8 | ADC7_GPIO1)
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#define PM8350B_ADC7_GPIO2 (PM8350B_SID << 8 | ADC7_GPIO2)
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#define PM8350B_ADC7_GPIO3 (PM8350B_SID << 8 | ADC7_GPIO3)
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#define PM8350B_ADC7_GPIO4 (PM8350B_SID << 8 | ADC7_GPIO4)
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#define PM8350B_ADC7_CHG_TEMP (PM8350B_SID << 8 | 0x10)
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#define PM8350B_ADC7_USB_IN_V_16 (PM8350B_SID << 8 | 0x11)
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#define PM8350B_ADC7_VDC_16 (PM8350B_SID << 8 | 0x12)
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#define PM8350B_ADC7_CC1_ID (PM8350B_SID << 8 | 0x13)
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#define PM8350B_ADC7_VREF_BAT_THERM (PM8350B_SID << 8 | 0x15)
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#define PM8350B_ADC7_IIN_FB (PM8350B_SID << 8 | 0x17)
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#define PM8350B_ADC7_CHG_TEMP (PM8350B_SID << 8 | ADC7_CHG_TEMP)
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#define PM8350B_ADC7_USB_IN_V_16 (PM8350B_SID << 8 | ADC7_USB_IN_V_16)
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#define PM8350B_ADC7_VDC_16 (PM8350B_SID << 8 | ADC7_VDC_16)
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#define PM8350B_ADC7_CC1_ID (PM8350B_SID << 8 | ADC7_CC1_ID)
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#define PM8350B_ADC7_VREF_BAT_THERM (PM8350B_SID << 8 | ADC7_VREF_BAT_THERM)
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#define PM8350B_ADC7_IIN_FB (PM8350B_SID << 8 | ADC7_IIN_FB)
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/* 30k pull-up1 */
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#define PM8350B_ADC7_AMUX_THM1_30K_PU (PM8350B_SID << 8 | 0x24)
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#define PM8350B_ADC7_AMUX_THM2_30K_PU (PM8350B_SID << 8 | 0x25)
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#define PM8350B_ADC7_AMUX_THM3_30K_PU (PM8350B_SID << 8 | 0x26)
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#define PM8350B_ADC7_AMUX_THM4_30K_PU (PM8350B_SID << 8 | 0x27)
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#define PM8350B_ADC7_AMUX_THM5_30K_PU (PM8350B_SID << 8 | 0x28)
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#define PM8350B_ADC7_AMUX_THM6_30K_PU (PM8350B_SID << 8 | 0x29)
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#define PM8350B_ADC7_GPIO1_30K_PU (PM8350B_SID << 8 | 0x2a)
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#define PM8350B_ADC7_GPIO2_30K_PU (PM8350B_SID << 8 | 0x2b)
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#define PM8350B_ADC7_GPIO3_30K_PU (PM8350B_SID << 8 | 0x2c)
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#define PM8350B_ADC7_GPIO4_30K_PU (PM8350B_SID << 8 | 0x2d)
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#define PM8350B_ADC7_CC1_ID_30K_PU (PM8350B_SID << 8 | 0x33)
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#define PM8350B_ADC7_AMUX_THM1_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_30K_PU)
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#define PM8350B_ADC7_AMUX_THM2_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_30K_PU)
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#define PM8350B_ADC7_AMUX_THM3_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_30K_PU)
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#define PM8350B_ADC7_AMUX_THM4_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_30K_PU)
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#define PM8350B_ADC7_AMUX_THM5_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_30K_PU)
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#define PM8350B_ADC7_AMUX_THM6_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_30K_PU)
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#define PM8350B_ADC7_GPIO1_30K_PU (PM8350B_SID << 8 | ADC7_GPIO1_30K_PU)
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#define PM8350B_ADC7_GPIO2_30K_PU (PM8350B_SID << 8 | ADC7_GPIO2_30K_PU)
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#define PM8350B_ADC7_GPIO3_30K_PU (PM8350B_SID << 8 | ADC7_GPIO3_30K_PU)
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#define PM8350B_ADC7_GPIO4_30K_PU (PM8350B_SID << 8 | ADC7_GPIO4_30K_PU)
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#define PM8350B_ADC7_CC1_ID_30K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_30K_PU)
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/* 100k pull-up2 */
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#define PM8350B_ADC7_AMUX_THM1_100K_PU (PM8350B_SID << 8 | 0x44)
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#define PM8350B_ADC7_AMUX_THM2_100K_PU (PM8350B_SID << 8 | 0x45)
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#define PM8350B_ADC7_AMUX_THM3_100K_PU (PM8350B_SID << 8 | 0x46)
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#define PM8350B_ADC7_AMUX_THM4_100K_PU (PM8350B_SID << 8 | 0x47)
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#define PM8350B_ADC7_AMUX_THM5_100K_PU (PM8350B_SID << 8 | 0x48)
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#define PM8350B_ADC7_AMUX_THM6_100K_PU (PM8350B_SID << 8 | 0x49)
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#define PM8350B_ADC7_GPIO1_100K_PU (PM8350B_SID << 8 | 0x4a)
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#define PM8350B_ADC7_GPIO2_100K_PU (PM8350B_SID << 8 | 0x4b)
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#define PM8350B_ADC7_GPIO3_100K_PU (PM8350B_SID << 8 | 0x4c)
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#define PM8350B_ADC7_GPIO4_100K_PU (PM8350B_SID << 8 | 0x4d)
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#define PM8350B_ADC7_CC1_ID_100K_PU (PM8350B_SID << 8 | 0x53)
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#define PM8350B_ADC7_AMUX_THM1_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_100K_PU)
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#define PM8350B_ADC7_AMUX_THM2_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_100K_PU)
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#define PM8350B_ADC7_AMUX_THM3_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_100K_PU)
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#define PM8350B_ADC7_AMUX_THM4_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_100K_PU)
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#define PM8350B_ADC7_AMUX_THM5_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_100K_PU)
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#define PM8350B_ADC7_AMUX_THM6_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_100K_PU)
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#define PM8350B_ADC7_GPIO1_100K_PU (PM8350B_SID << 8 | ADC7_GPIO1_100K_PU)
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#define PM8350B_ADC7_GPIO2_100K_PU (PM8350B_SID << 8 | ADC7_GPIO2_100K_PU)
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#define PM8350B_ADC7_GPIO3_100K_PU (PM8350B_SID << 8 | ADC7_GPIO3_100K_PU)
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#define PM8350B_ADC7_GPIO4_100K_PU (PM8350B_SID << 8 | ADC7_GPIO4_100K_PU)
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#define PM8350B_ADC7_CC1_ID_100K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_100K_PU)
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/* 400k pull-up3 */
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#define PM8350B_ADC7_AMUX_THM1_400K_PU (PM8350B_SID << 8 | 0x64)
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#define PM8350B_ADC7_AMUX_THM2_400K_PU (PM8350B_SID << 8 | 0x65)
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#define PM8350B_ADC7_AMUX_THM3_400K_PU (PM8350B_SID << 8 | 0x66)
|
||||
#define PM8350B_ADC7_AMUX_THM4_400K_PU (PM8350B_SID << 8 | 0x67)
|
||||
#define PM8350B_ADC7_AMUX_THM5_400K_PU (PM8350B_SID << 8 | 0x68)
|
||||
#define PM8350B_ADC7_AMUX_THM6_400K_PU (PM8350B_SID << 8 | 0x69)
|
||||
#define PM8350B_ADC7_GPIO1_400K_PU (PM8350B_SID << 8 | 0x6a)
|
||||
#define PM8350B_ADC7_GPIO2_400K_PU (PM8350B_SID << 8 | 0x6b)
|
||||
#define PM8350B_ADC7_GPIO3_400K_PU (PM8350B_SID << 8 | 0x6c)
|
||||
#define PM8350B_ADC7_GPIO4_400K_PU (PM8350B_SID << 8 | 0x6d)
|
||||
#define PM8350B_ADC7_CC1_ID_400K_PU (PM8350B_SID << 8 | 0x73)
|
||||
#define PM8350B_ADC7_AMUX_THM1_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_400K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM2_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_400K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM3_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_400K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM4_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_400K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM5_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_400K_PU)
|
||||
#define PM8350B_ADC7_AMUX_THM6_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_400K_PU)
|
||||
#define PM8350B_ADC7_GPIO1_400K_PU (PM8350B_SID << 8 | ADC7_GPIO1_400K_PU)
|
||||
#define PM8350B_ADC7_GPIO2_400K_PU (PM8350B_SID << 8 | ADC7_GPIO2_400K_PU)
|
||||
#define PM8350B_ADC7_GPIO3_400K_PU (PM8350B_SID << 8 | ADC7_GPIO3_400K_PU)
|
||||
#define PM8350B_ADC7_GPIO4_400K_PU (PM8350B_SID << 8 | ADC7_GPIO4_400K_PU)
|
||||
#define PM8350B_ADC7_CC1_ID_400K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_400K_PU)
|
||||
|
||||
/* 1/3 Divider */
|
||||
#define PM8350B_ADC7_GPIO1_DIV3 (PM8350B_SID << 8 | 0x8a)
|
||||
#define PM8350B_ADC7_GPIO2_DIV3 (PM8350B_SID << 8 | 0x8b)
|
||||
#define PM8350B_ADC7_GPIO3_DIV3 (PM8350B_SID << 8 | 0x8c)
|
||||
#define PM8350B_ADC7_GPIO4_DIV3 (PM8350B_SID << 8 | 0x8d)
|
||||
#define PM8350B_ADC7_GPIO1_DIV3 (PM8350B_SID << 8 | ADC7_GPIO1_DIV3)
|
||||
#define PM8350B_ADC7_GPIO2_DIV3 (PM8350B_SID << 8 | ADC7_GPIO2_DIV3)
|
||||
#define PM8350B_ADC7_GPIO3_DIV3 (PM8350B_SID << 8 | ADC7_GPIO3_DIV3)
|
||||
#define PM8350B_ADC7_GPIO4_DIV3 (PM8350B_SID << 8 | ADC7_GPIO4_DIV3)
|
||||
|
||||
#define PM8350B_ADC7_VPH_PWR (PM8350B_SID << 8 | 0x8e)
|
||||
#define PM8350B_ADC7_VBAT_SNS (PM8350B_SID << 8 | 0x8f)
|
||||
#define PM8350B_ADC7_VPH_PWR (PM8350B_SID << 8 | ADC7_VPH_PWR)
|
||||
#define PM8350B_ADC7_VBAT_SNS (PM8350B_SID << 8 | ADC7_VBAT_SNS)
|
||||
|
||||
#define PM8350B_ADC7_SBUx (PM8350B_SID << 8 | 0x94)
|
||||
#define PM8350B_ADC7_VBAT_2S_MID (PM8350B_SID << 8 | 0x96)
|
||||
#define PM8350B_ADC7_SBUx (PM8350B_SID << 8 | ADC7_SBU)
|
||||
#define PM8350B_ADC7_VBAT_2S_MID (PM8350B_SID << 8 | ADC7_VBAT_2S_MID)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H */
|
||||
|
|
|
|||
|
|
@ -10,37 +10,39 @@
|
|||
#define PMK8350_SID 0
|
||||
#endif
|
||||
|
||||
/* ADC channels for PMK8350_ADC for PMIC7 */
|
||||
#define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | 0x0)
|
||||
#define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | 0x01)
|
||||
#define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | 0x02)
|
||||
#define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | 0x03)
|
||||
#include <dt-bindings/iio/qcom,spmi-vadc.h>
|
||||
|
||||
#define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | 0x04)
|
||||
#define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | 0x05)
|
||||
#define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | 0x06)
|
||||
#define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | 0x07)
|
||||
#define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | 0x08)
|
||||
/* ADC channels for PMK8350_ADC for PMIC7 */
|
||||
#define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | ADC7_REF_GND)
|
||||
#define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | ADC7_1P25VREF)
|
||||
#define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | ADC7_VREF_VADC)
|
||||
#define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | ADC7_DIE_TEMP)
|
||||
|
||||
#define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | ADC7_AMUX_THM1)
|
||||
#define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | ADC7_AMUX_THM2)
|
||||
#define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | ADC7_AMUX_THM3)
|
||||
#define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | ADC7_AMUX_THM4)
|
||||
#define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | ADC7_AMUX_THM5)
|
||||
|
||||
/* 30k pull-up1 */
|
||||
#define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | 0x24)
|
||||
#define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | 0x25)
|
||||
#define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | 0x26)
|
||||
#define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | 0x27)
|
||||
#define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | 0x28)
|
||||
#define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_30K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_30K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_30K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_30K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_30K_PU)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | 0x44)
|
||||
#define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | 0x45)
|
||||
#define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | 0x46)
|
||||
#define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | 0x47)
|
||||
#define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | 0x48)
|
||||
#define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_100K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_100K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_100K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_100K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_100K_PU)
|
||||
|
||||
/* 400k pull-up3 */
|
||||
#define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | 0x64)
|
||||
#define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | 0x65)
|
||||
#define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | 0x66)
|
||||
#define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | 0x67)
|
||||
#define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | 0x68)
|
||||
#define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_400K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_400K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_400K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_400K_PU)
|
||||
#define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_400K_PU)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H */
|
||||
|
|
|
|||
|
|
@ -10,19 +10,21 @@
|
|||
#define PMR735A_SID 4
|
||||
#endif
|
||||
|
||||
/* ADC channels for PMR735A_ADC for PMIC7 */
|
||||
#define PMR735A_ADC7_REF_GND (PMR735A_SID << 8 | 0x0)
|
||||
#define PMR735A_ADC7_1P25VREF (PMR735A_SID << 8 | 0x01)
|
||||
#define PMR735A_ADC7_VREF_VADC (PMR735A_SID << 8 | 0x02)
|
||||
#define PMR735A_ADC7_DIE_TEMP (PMR735A_SID << 8 | 0x03)
|
||||
#include <dt-bindings/iio/qcom,spmi-vadc.h>
|
||||
|
||||
#define PMR735A_ADC7_GPIO1 (PMR735A_SID << 8 | 0x0a)
|
||||
#define PMR735A_ADC7_GPIO2 (PMR735A_SID << 8 | 0x0b)
|
||||
#define PMR735A_ADC7_GPIO3 (PMR735A_SID << 8 | 0x0c)
|
||||
/* ADC channels for PMR735A_ADC for PMIC7 */
|
||||
#define PMR735A_ADC7_REF_GND (PMR735A_SID << 8 | ADC7_REF_GND)
|
||||
#define PMR735A_ADC7_1P25VREF (PMR735A_SID << 8 | ADC7_1P25VREF)
|
||||
#define PMR735A_ADC7_VREF_VADC (PMR735A_SID << 8 | ADC7_VREF_VADC)
|
||||
#define PMR735A_ADC7_DIE_TEMP (PMR735A_SID << 8 | ADC7_DIE_TEMP)
|
||||
|
||||
#define PMR735A_ADC7_GPIO1 (PMR735A_SID << 8 | ADC7_GPIO1)
|
||||
#define PMR735A_ADC7_GPIO2 (PMR735A_SID << 8 | ADC7_GPIO2)
|
||||
#define PMR735A_ADC7_GPIO3 (PMR735A_SID << 8 | ADC7_GPIO3)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PMR735A_ADC7_GPIO1_100K_PU (PMR735A_SID << 8 | 0x4a)
|
||||
#define PMR735A_ADC7_GPIO2_100K_PU (PMR735A_SID << 8 | 0x4b)
|
||||
#define PMR735A_ADC7_GPIO3_100K_PU (PMR735A_SID << 8 | 0x4c)
|
||||
#define PMR735A_ADC7_GPIO1_100K_PU (PMR735A_SID << 8 | ADC7_GPIO1_100K_PU)
|
||||
#define PMR735A_ADC7_GPIO2_100K_PU (PMR735A_SID << 8 | ADC7_GPIO2_100K_PU)
|
||||
#define PMR735A_ADC7_GPIO3_100K_PU (PMR735A_SID << 8 | ADC7_GPIO3_100K_PU)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H */
|
||||
|
|
|
|||
|
|
@ -10,19 +10,21 @@
|
|||
#define PMR735B_SID 5
|
||||
#endif
|
||||
|
||||
/* ADC channels for PMR735B_ADC for PMIC7 */
|
||||
#define PMR735B_ADC7_REF_GND (PMR735B_SID << 8 | 0x0)
|
||||
#define PMR735B_ADC7_1P25VREF (PMR735B_SID << 8 | 0x01)
|
||||
#define PMR735B_ADC7_VREF_VADC (PMR735B_SID << 8 | 0x02)
|
||||
#define PMR735B_ADC7_DIE_TEMP (PMR735B_SID << 8 | 0x03)
|
||||
#include <dt-bindings/iio/qcom,spmi-vadc.h>
|
||||
|
||||
#define PMR735B_ADC7_GPIO1 (PMR735B_SID << 8 | 0x0a)
|
||||
#define PMR735B_ADC7_GPIO2 (PMR735B_SID << 8 | 0x0b)
|
||||
#define PMR735B_ADC7_GPIO3 (PMR735B_SID << 8 | 0x0c)
|
||||
/* ADC channels for PMR735B_ADC for PMIC7 */
|
||||
#define PMR735B_ADC7_REF_GND (PMR735B_SID << 8 | ADC7_REF_GND)
|
||||
#define PMR735B_ADC7_1P25VREF (PMR735B_SID << 8 | ADC7_1P25VREF)
|
||||
#define PMR735B_ADC7_VREF_VADC (PMR735B_SID << 8 | ADC7_VREF_VADC)
|
||||
#define PMR735B_ADC7_DIE_TEMP (PMR735B_SID << 8 | ADC7_DIE_TEMP)
|
||||
|
||||
#define PMR735B_ADC7_GPIO1 (PMR735B_SID << 8 | ADC7_GPIO1)
|
||||
#define PMR735B_ADC7_GPIO2 (PMR735B_SID << 8 | ADC7_GPIO2)
|
||||
#define PMR735B_ADC7_GPIO3 (PMR735B_SID << 8 | ADC7_GPIO3)
|
||||
|
||||
/* 100k pull-up2 */
|
||||
#define PMR735B_ADC7_GPIO1_100K_PU (PMR735B_SID << 8 | 0x4a)
|
||||
#define PMR735B_ADC7_GPIO2_100K_PU (PMR735B_SID << 8 | 0x4b)
|
||||
#define PMR735B_ADC7_GPIO3_100K_PU (PMR735B_SID << 8 | 0x4c)
|
||||
#define PMR735B_ADC7_GPIO1_100K_PU (PMR735B_SID << 8 | ADC7_GPIO1_100K_PU)
|
||||
#define PMR735B_ADC7_GPIO2_100K_PU (PMR735B_SID << 8 | ADC7_GPIO2_100K_PU)
|
||||
#define PMR735B_ADC7_GPIO3_100K_PU (PMR735B_SID << 8 | ADC7_GPIO3_100K_PU)
|
||||
|
||||
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H */
|
||||
|
|
|
|||
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Reference in New Issue