drm/amd: Add IMU fw version to fw version queries
IMU is a new firmware for GFX11. There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs, and the AMDGPU_INFO_FW_VERSION option in the amdgpu info ioctl. Add IMU as an option for those four methods. V2: Added debugfs Reviewed-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -344,6 +344,10 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info,
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fw_info->ver = adev->mes.ucode_fw_version[1];
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fw_info->feature = 0;
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break;
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case AMDGPU_INFO_FW_IMU:
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fw_info->ver = adev->gfx.imu_fw_version;
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fw_info->feature = 0;
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break;
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default:
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return -EINVAL;
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}
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@ -1520,6 +1524,15 @@ static int amdgpu_debugfs_firmware_info_show(struct seq_file *m, void *unused)
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fw_info.feature, fw_info.ver);
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}
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/* IMU */
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query_fw.fw_type = AMDGPU_INFO_FW_IMU;
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query_fw.index = 0;
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ret = amdgpu_firmware_info(&fw_info, &query_fw, adev);
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if (ret)
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return ret;
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seq_printf(m, "IMU feature version: %u, firmware version: 0x%08x\n",
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fw_info.feature, fw_info.ver);
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/* PSP SOS */
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query_fw.fw_type = AMDGPU_INFO_FW_SOS;
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ret = amdgpu_firmware_info(&fw_info, &query_fw, adev);
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@ -698,6 +698,7 @@ FW_VERSION_ATTR(rlc_srlg_fw_version, 0444, gfx.rlc_srlg_fw_version);
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FW_VERSION_ATTR(rlc_srls_fw_version, 0444, gfx.rlc_srls_fw_version);
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FW_VERSION_ATTR(mec_fw_version, 0444, gfx.mec_fw_version);
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FW_VERSION_ATTR(mec2_fw_version, 0444, gfx.mec2_fw_version);
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FW_VERSION_ATTR(imu_fw_version, 0444, gfx.imu_fw_version);
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FW_VERSION_ATTR(sos_fw_version, 0444, psp.sos.fw_version);
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FW_VERSION_ATTR(asd_fw_version, 0444, psp.asd_context.bin_desc.fw_version);
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FW_VERSION_ATTR(ta_ras_fw_version, 0444, psp.ras_context.context.bin_desc.fw_version);
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@ -719,7 +720,8 @@ static struct attribute *fw_attrs[] = {
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&dev_attr_ta_ras_fw_version.attr, &dev_attr_ta_xgmi_fw_version.attr,
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&dev_attr_smc_fw_version.attr, &dev_attr_sdma_fw_version.attr,
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&dev_attr_sdma2_fw_version.attr, &dev_attr_vcn_fw_version.attr,
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&dev_attr_dmcu_fw_version.attr, NULL
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&dev_attr_dmcu_fw_version.attr, &dev_attr_imu_fw_version.attr,
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NULL
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};
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static const struct attribute_group fw_attr_group = {
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@ -547,6 +547,7 @@ static void amdgpu_virt_populate_vf2pf_ucode_info(struct amdgpu_device *adev)
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POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_RLC_SRLS, adev->gfx.rlc_srls_fw_version);
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POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_MEC, adev->gfx.mec_fw_version);
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POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_MEC2, adev->gfx.mec2_fw_version);
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POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_IMU, adev->gfx.imu_fw_version);
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POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_SOS, adev->psp.sos.fw_version);
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POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_ASD,
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adev->psp.asd_context.bin_desc.fw_version);
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@ -70,6 +70,7 @@ enum amd_sriov_ucode_engine_id {
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AMD_SRIOV_UCODE_ID_RLC_SRLS,
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AMD_SRIOV_UCODE_ID_MEC,
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AMD_SRIOV_UCODE_ID_MEC2,
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AMD_SRIOV_UCODE_ID_IMU,
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AMD_SRIOV_UCODE_ID_SOS,
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AMD_SRIOV_UCODE_ID_ASD,
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AMD_SRIOV_UCODE_ID_TA_RAS,
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@ -763,6 +763,8 @@ struct drm_amdgpu_cs_chunk_data {
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#define AMDGPU_INFO_FW_MES_KIQ 0x19
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/* Subquery id: Query MES firmware version */
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#define AMDGPU_INFO_FW_MES 0x1a
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/* Subquery id: Query IMU firmware version */
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#define AMDGPU_INFO_FW_IMU 0x1b
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/* number of bytes moved for TTM migration */
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#define AMDGPU_INFO_NUM_BYTES_MOVED 0x0f
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