Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes
* 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: drm/i915: enable dip before writing data on gen4 fixing dmi match for hp t5745 and hp st5747 thin client drm/i915: Only enable IPS polling for gen5 drm/i915: Do not read non-existent DPLL registers on PCH hardware
This commit is contained in:
commit
b6bb962589
|
@ -1224,6 +1224,9 @@ static int i915_emon_status(struct seq_file *m, void *unused)
|
|||
unsigned long temp, chipset, gfx;
|
||||
int ret;
|
||||
|
||||
if (!IS_GEN5(dev))
|
||||
return -ENODEV;
|
||||
|
||||
ret = mutex_lock_interruptible(&dev->struct_mutex);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
|
@ -1701,6 +1701,9 @@ void i915_update_gfx_val(struct drm_i915_private *dev_priv)
|
|||
unsigned long diffms;
|
||||
u32 count;
|
||||
|
||||
if (dev_priv->info->gen != 5)
|
||||
return;
|
||||
|
||||
getrawmonotonic(&now);
|
||||
diff1 = timespec_sub(now, dev_priv->last_time2);
|
||||
|
||||
|
@ -2121,12 +2124,14 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
|
|||
setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed,
|
||||
(unsigned long) dev);
|
||||
|
||||
spin_lock(&mchdev_lock);
|
||||
i915_mch_dev = dev_priv;
|
||||
dev_priv->mchdev_lock = &mchdev_lock;
|
||||
spin_unlock(&mchdev_lock);
|
||||
if (IS_GEN5(dev)) {
|
||||
spin_lock(&mchdev_lock);
|
||||
i915_mch_dev = dev_priv;
|
||||
dev_priv->mchdev_lock = &mchdev_lock;
|
||||
spin_unlock(&mchdev_lock);
|
||||
|
||||
ips_ping_for_i915_load();
|
||||
ips_ping_for_i915_load();
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
|
|
|
@ -7072,9 +7072,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
|
|||
struct drm_device *dev = crtc->dev;
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
int pipe = intel_crtc->pipe;
|
||||
int dpll_reg = DPLL(pipe);
|
||||
int dpll = I915_READ(dpll_reg);
|
||||
|
||||
if (HAS_PCH_SPLIT(dev))
|
||||
return;
|
||||
|
@ -7087,10 +7084,15 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
|
|||
* the manual case.
|
||||
*/
|
||||
if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) {
|
||||
int pipe = intel_crtc->pipe;
|
||||
int dpll_reg = DPLL(pipe);
|
||||
u32 dpll;
|
||||
|
||||
DRM_DEBUG_DRIVER("downclocking LVDS\n");
|
||||
|
||||
assert_panel_unlocked(dev_priv, pipe);
|
||||
|
||||
dpll = I915_READ(dpll_reg);
|
||||
dpll |= DISPLAY_RATE_SELECT_FPA1;
|
||||
I915_WRITE(dpll_reg, dpll);
|
||||
intel_wait_for_vblank(dev, pipe);
|
||||
|
@ -7098,7 +7100,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
|
|||
if (!(dpll & DISPLAY_RATE_SELECT_FPA1))
|
||||
DRM_DEBUG_DRIVER("failed to downclock LVDS!\n");
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -136,7 +136,7 @@ static void i9xx_write_infoframe(struct drm_encoder *encoder,
|
|||
|
||||
val &= ~VIDEO_DIP_SELECT_MASK;
|
||||
|
||||
I915_WRITE(VIDEO_DIP_CTL, val | port | flags);
|
||||
I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | val | port | flags);
|
||||
|
||||
for (i = 0; i < len; i += 4) {
|
||||
I915_WRITE(VIDEO_DIP_DATA, *data);
|
||||
|
|
|
@ -750,7 +750,7 @@ static const struct dmi_system_id intel_no_lvds[] = {
|
|||
.ident = "Hewlett-Packard t5745",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "hp t5745"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
|
||||
},
|
||||
},
|
||||
{
|
||||
|
@ -758,7 +758,7 @@ static const struct dmi_system_id intel_no_lvds[] = {
|
|||
.ident = "Hewlett-Packard st5747",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "hp st5747"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
|
||||
},
|
||||
},
|
||||
{
|
||||
|
|
Loading…
Reference in New Issue