drm/i915/pmu: Report frequency as zero while GPU is sleeping
We used to report the minimum possible frequency as both requested and active while GPU was in sleep state. This was a consequence of sampling the value from the "current frequency" field in our software tracking. This was strictly speaking wrong, but given that until recently the current frequency in sleeping state used to be equal to minimum, it did not stand out sufficiently to be noticed as such. After some recent changes have made the current frequency be reported as last active before GPU went to sleep, meaning both requested and active frequencies could end up being reported at their maximum values for the duration of the GPU idle state, it became much more obvious that this does not make sense. To fix this we will now sample the frequency counters only when the GPU is awake. As a consequence reported frequencies could be reported as below the GPU reported minimum but that should be much less confusing that the current situation. v2: * Split out early exit conditions for readability. (Chris) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Closes: https://gitlab.freedesktop.org/drm/intel/issues/675 Link: https://patchwork.freedesktop.org/patch/msgid/20191129105436.20100-1-tvrtko.ursulin@linux.intel.com
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@ -370,6 +370,13 @@ add_sample_mult(struct i915_pmu_sample *sample, u32 val, u32 mul)
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sample->cur += mul_u32_u32(val, mul);
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}
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static bool frequency_sampling_enabled(struct i915_pmu *pmu)
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{
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return pmu->enable &
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(config_enabled_mask(I915_PMU_ACTUAL_FREQUENCY) |
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config_enabled_mask(I915_PMU_REQUESTED_FREQUENCY));
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}
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static void
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frequency_sample(struct intel_gt *gt, unsigned int period_ns)
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{
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@ -378,13 +385,16 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
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struct i915_pmu *pmu = &i915->pmu;
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struct intel_rps *rps = >->rps;
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if (!frequency_sampling_enabled(pmu))
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return;
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/* Report 0/0 (actual/requested) frequency while parked. */
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if (!intel_gt_pm_get_if_awake(gt))
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return;
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if (pmu->enable & config_enabled_mask(I915_PMU_ACTUAL_FREQUENCY)) {
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u32 val;
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val = rps->cur_freq;
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if (intel_gt_pm_get_if_awake(gt)) {
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u32 stat;
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/*
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* We take a quick peek here without using forcewake
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* so that we don't perturb the system under observation
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@ -394,16 +404,14 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
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* case we assume the system is running at the intended
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* frequency. Fortunately, the read should rarely fail!
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*/
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stat = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
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if (stat)
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val = intel_get_cagf(rps, stat);
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intel_gt_pm_put_async(gt);
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}
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val = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
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if (val)
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val = intel_get_cagf(rps, val);
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else
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val = rps->cur_freq;
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add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT],
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intel_gpu_freq(rps, val),
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period_ns / 1000);
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intel_gpu_freq(rps, val), period_ns / 1000);
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}
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if (pmu->enable & config_enabled_mask(I915_PMU_REQUESTED_FREQUENCY)) {
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@ -411,6 +419,8 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
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intel_gpu_freq(rps, rps->cur_freq),
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period_ns / 1000);
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}
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intel_gt_pm_put_async(gt);
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}
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static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer)
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