drm/i915/pmu: Report frequency as zero while GPU is sleeping

We used to report the minimum possible frequency as both requested and
active while GPU was in sleep state. This was a consequence of sampling
the value from the "current frequency" field in our software tracking.

This was strictly speaking wrong, but given that until recently the
current frequency in sleeping state used to be equal to minimum, it did
not stand out sufficiently to be noticed as such.

After some recent changes have made the current frequency be reported
as last active before GPU went to sleep, meaning both requested and active
frequencies could end up being reported at their maximum values for the
duration of the GPU idle state, it became much more obvious that this does
not make sense.

To fix this we will now sample the frequency counters only when the GPU is
awake. As a consequence reported frequencies could be reported as below
the GPU reported minimum but that should be much less confusing that the
current situation.

v2:
 * Split out early exit conditions for readability. (Chris)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Closes: https://gitlab.freedesktop.org/drm/intel/issues/675
Link: https://patchwork.freedesktop.org/patch/msgid/20191129105436.20100-1-tvrtko.ursulin@linux.intel.com
This commit is contained in:
Tvrtko Ursulin 2019-11-29 10:54:36 +00:00
parent 1a74934b0e
commit b66ecd0438
1 changed files with 31 additions and 21 deletions

View File

@ -370,6 +370,13 @@ add_sample_mult(struct i915_pmu_sample *sample, u32 val, u32 mul)
sample->cur += mul_u32_u32(val, mul); sample->cur += mul_u32_u32(val, mul);
} }
static bool frequency_sampling_enabled(struct i915_pmu *pmu)
{
return pmu->enable &
(config_enabled_mask(I915_PMU_ACTUAL_FREQUENCY) |
config_enabled_mask(I915_PMU_REQUESTED_FREQUENCY));
}
static void static void
frequency_sample(struct intel_gt *gt, unsigned int period_ns) frequency_sample(struct intel_gt *gt, unsigned int period_ns)
{ {
@ -378,13 +385,16 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
struct i915_pmu *pmu = &i915->pmu; struct i915_pmu *pmu = &i915->pmu;
struct intel_rps *rps = &gt->rps; struct intel_rps *rps = &gt->rps;
if (!frequency_sampling_enabled(pmu))
return;
/* Report 0/0 (actual/requested) frequency while parked. */
if (!intel_gt_pm_get_if_awake(gt))
return;
if (pmu->enable & config_enabled_mask(I915_PMU_ACTUAL_FREQUENCY)) { if (pmu->enable & config_enabled_mask(I915_PMU_ACTUAL_FREQUENCY)) {
u32 val; u32 val;
val = rps->cur_freq;
if (intel_gt_pm_get_if_awake(gt)) {
u32 stat;
/* /*
* We take a quick peek here without using forcewake * We take a quick peek here without using forcewake
* so that we don't perturb the system under observation * so that we don't perturb the system under observation
@ -394,16 +404,14 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
* case we assume the system is running at the intended * case we assume the system is running at the intended
* frequency. Fortunately, the read should rarely fail! * frequency. Fortunately, the read should rarely fail!
*/ */
stat = intel_uncore_read_fw(uncore, GEN6_RPSTAT1); val = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
if (stat) if (val)
val = intel_get_cagf(rps, stat); val = intel_get_cagf(rps, val);
else
intel_gt_pm_put_async(gt); val = rps->cur_freq;
}
add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT], add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT],
intel_gpu_freq(rps, val), intel_gpu_freq(rps, val), period_ns / 1000);
period_ns / 1000);
} }
if (pmu->enable & config_enabled_mask(I915_PMU_REQUESTED_FREQUENCY)) { if (pmu->enable & config_enabled_mask(I915_PMU_REQUESTED_FREQUENCY)) {
@ -411,6 +419,8 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
intel_gpu_freq(rps, rps->cur_freq), intel_gpu_freq(rps, rps->cur_freq),
period_ns / 1000); period_ns / 1000);
} }
intel_gt_pm_put_async(gt);
} }
static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer) static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer)