Merge branch 'remotes/lorenzo/pci/tegra'
- Fix checking of pm_runtime_get_sync() return value (David Engraf) - Fix AFI_PEX2_CTRL reg offset for Tegra30 (Marcel Ziswiler) * remotes/lorenzo/pci/tegra: PCI: tegra: Fix afi_pex2_ctrl reg offset for Tegra30 PCI: tegra: Fix return value check of pm_runtime_get_sync()
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b647d2bd80
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@ -2499,7 +2499,6 @@ static const struct tegra_pcie_soc tegra20_pcie = {
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.num_ports = 2,
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.ports = tegra20_pcie_ports,
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.msi_base_shift = 0,
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.afi_pex2_ctrl = 0x128,
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.pads_pll_ctl = PADS_PLL_CTL_TEGRA20,
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.tx_ref_sel = PADS_PLL_CTL_TXCLKREF_DIV10,
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.pads_refclk_cfg0 = 0xfa5cfa5c,
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@ -2528,6 +2527,7 @@ static const struct tegra_pcie_soc tegra30_pcie = {
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.num_ports = 3,
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.ports = tegra30_pcie_ports,
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.msi_base_shift = 8,
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.afi_pex2_ctrl = 0x128,
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.pads_pll_ctl = PADS_PLL_CTL_TEGRA30,
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.tx_ref_sel = PADS_PLL_CTL_TXCLKREF_BUF_EN,
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.pads_refclk_cfg0 = 0xfa5cfa5c,
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@ -2798,7 +2798,7 @@ static int tegra_pcie_probe(struct platform_device *pdev)
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pm_runtime_enable(pcie->dev);
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err = pm_runtime_get_sync(pcie->dev);
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if (err) {
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if (err < 0) {
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dev_err(dev, "fail to enable pcie controller: %d\n", err);
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goto teardown_msi;
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}
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