drm/amd/display: [FW Promotion] Release 0.0.46
- Add new aux_channel_type - Changed port_index to instance in dmub_cmd_dp_aux_control_data - Change aux_return_code_type to sync up with driver - param for ramping abm based on backlight level Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -47,10 +47,10 @@
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/* Firmware versioning. */
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#ifdef DMUB_EXPOSE_VERSION
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#define DMUB_FW_VERSION_GIT_HASH 0x931573111
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#define DMUB_FW_VERSION_GIT_HASH 0xa18e25995
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#define DMUB_FW_VERSION_MAJOR 0
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#define DMUB_FW_VERSION_MINOR 0
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#define DMUB_FW_VERSION_REVISION 45
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#define DMUB_FW_VERSION_REVISION 46
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#define DMUB_FW_VERSION_TEST 0
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#define DMUB_FW_VERSION_VBIOS 0
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#define DMUB_FW_VERSION_HOTFIX 0
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@ -514,12 +514,20 @@ enum dp_aux_request_action {
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enum aux_return_code_type {
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AUX_RET_SUCCESS = 0,
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AUX_RET_ERROR_UNKNOWN,
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AUX_RET_ERROR_INVALID_REPLY,
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AUX_RET_ERROR_TIMEOUT,
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AUX_RET_ERROR_NO_DATA,
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AUX_RET_ERROR_HPD_DISCON,
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AUX_RET_ERROR_ENGINE_ACQUIRE,
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AUX_RET_ERROR_INVALID_OPERATION,
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AUX_RET_ERROR_PROTOCOL_ERROR,
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};
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enum aux_channel_type {
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AUX_CHANNEL_LEGACY_DDC,
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AUX_CHANNEL_DPIA
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};
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/* DP AUX command */
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struct aux_transaction_parameters {
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uint8_t is_i2c_over_aux;
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@ -532,9 +540,10 @@ struct aux_transaction_parameters {
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struct dmub_cmd_dp_aux_control_data {
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uint32_t handle;
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uint8_t port_index;
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uint8_t instance;
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uint8_t sw_crc_enabled;
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uint16_t timeout;
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enum aux_channel_type type;
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struct aux_transaction_parameters dpaux;
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};
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@ -558,7 +567,7 @@ struct aux_reply_data {
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struct aux_reply_control_data {
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uint32_t handle;
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uint8_t phy_port_index;
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uint8_t instance;
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uint8_t result;
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uint16_t pad;
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};
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@ -581,7 +590,7 @@ enum dp_hpd_status {
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};
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struct dp_hpd_data {
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uint8_t phy_port_index;
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uint8_t instance;
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uint8_t hpd_type;
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uint8_t hpd_status;
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uint8_t pad;
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@ -732,27 +741,30 @@ enum dmub_cmd_abm_type {
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struct abm_config_table {
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/* Parameters for crgb conversion */
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uint16_t crgb_thresh[NUM_POWER_FN_SEGS]; // 0B
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uint16_t crgb_offset[NUM_POWER_FN_SEGS]; // 15B
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uint16_t crgb_slope[NUM_POWER_FN_SEGS]; // 31B
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uint16_t crgb_offset[NUM_POWER_FN_SEGS]; // 16B
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uint16_t crgb_slope[NUM_POWER_FN_SEGS]; // 32B
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/* Parameters for custom curve */
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uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS]; // 47B
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uint16_t backlight_offsets[NUM_BL_CURVE_SEGS]; // 79B
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uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS]; // 48B
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uint16_t backlight_offsets[NUM_BL_CURVE_SEGS]; // 78B
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uint16_t ambient_thresholds_lux[NUM_AMBI_LEVEL]; // 111B
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uint16_t min_abm_backlight; // 121B
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uint16_t ambient_thresholds_lux[NUM_AMBI_LEVEL]; // 112B
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uint16_t min_abm_backlight; // 122B
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uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; // 123B
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uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; // 143B
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uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; // 163B
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uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; // 183B
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uint8_t hybrid_factor[NUM_AGGR_LEVEL]; // 203B
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uint8_t contrast_factor[NUM_AGGR_LEVEL]; // 207B
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uint8_t deviation_gain[NUM_AGGR_LEVEL]; // 211B
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uint8_t min_knee[NUM_AGGR_LEVEL]; // 215B
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uint8_t max_knee[NUM_AGGR_LEVEL]; // 219B
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uint8_t iir_curve[NUM_AMBI_LEVEL]; // 223B
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uint8_t pad3[3]; // 228B
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uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; // 124B
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uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; // 144B
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uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; // 164B
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uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; // 184B
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uint8_t hybrid_factor[NUM_AGGR_LEVEL]; // 204B
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uint8_t contrast_factor[NUM_AGGR_LEVEL]; // 208B
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uint8_t deviation_gain[NUM_AGGR_LEVEL]; // 212B
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uint8_t min_knee[NUM_AGGR_LEVEL]; // 216B
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uint8_t max_knee[NUM_AGGR_LEVEL]; // 220B
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uint8_t iir_curve[NUM_AMBI_LEVEL]; // 224B
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uint8_t pad3[3]; // 229B
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uint16_t blRampReduction[NUM_AGGR_LEVEL]; // 232B
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uint16_t blRampStart[NUM_AGGR_LEVEL]; // 240B
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};
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struct dmub_cmd_abm_set_pipe_data {
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