rtw89: 8852c: update security engine setting
The security setting of 8852A and 8852C are different, so change the settings accordingly. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220325060055.58482-13-pkshih@realtek.com
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@ -1620,6 +1620,7 @@ static int mpdu_proc_init(struct rtw89_dev *rtwdev)
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static int sec_eng_init(struct rtw89_dev *rtwdev)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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u32 val = 0;
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int ret;
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@ -1633,7 +1634,8 @@ static int sec_eng_init(struct rtw89_dev *rtwdev)
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/* init TX encryption */
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val |= (B_AX_SEC_TX_ENC | B_AX_SEC_RX_DEC);
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val |= (B_AX_MC_DEC | B_AX_BC_DEC);
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val &= ~B_AX_TX_PARTIAL_MODE;
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if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B)
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val &= ~B_AX_TX_PARTIAL_MODE;
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rtw89_write32(rtwdev, R_AX_SEC_ENG_CTRL, val);
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/* init MIC ICV append */
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@ -1643,6 +1645,10 @@ static int sec_eng_init(struct rtw89_dev *rtwdev)
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/* option init */
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rtw89_write32(rtwdev, R_AX_SEC_MPDU_PROC, val);
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if (chip->chip_id == RTL8852C)
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rtw89_write32_mask(rtwdev, R_AX_SEC_DEBUG1,
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B_AX_TX_TIMEOUT_SEL_MASK, AX_TX_TO_VAL);
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return 0;
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}
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@ -799,6 +799,9 @@
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#define R_AX_SEC_CAM_RDATA 0x9D14
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#define R_AX_SEC_CAM_WDATA 0x9D18
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#define R_AX_SEC_DEBUG 0x9D1C
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#define R_AX_SEC_DEBUG1 0x9D1C
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#define B_AX_TX_TIMEOUT_SEL_MASK GENMASK(31, 30)
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#define AX_TX_TO_VAL 0x2
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#define R_AX_SEC_TX_DEBUG 0x9D20
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#define R_AX_SEC_RX_DEBUG 0x9D24
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#define R_AX_SEC_TRX_PKT_CNT 0x9D28
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