rtc: sun6i: Add support for H6 RTC
RTC on H6 is mostly the same as on H5 and H3. It has slight differences mostly in features that are not yet supported by this driver. Some differences are already stated in the comments in existing code. One other difference is that H6 has extra bit in LOSC_CTRL_REG, called EXT_LOSC_EN to enable/disable external low speed crystal oscillator. It also has bit EXT_LOSC_STA in LOSC_AUTO_SWT_STA_REG, to check whether external low speed oscillator is working correctly. This patch adds support for enabling LOSC when necessary: - during reparenting - when probing the clock H6 also has capacbility to automatically reparent RTC clock from external crystal oscillator, to internal RC oscillator, if external oscillator fails. This is enabled by default. Disable it during probe. Signed-off-by: Ondrej Jirman <megous@megous.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20190820151934.3860-3-megous@megous.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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@ -32,9 +32,11 @@
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/* Control register */
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#define SUN6I_LOSC_CTRL 0x0000
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#define SUN6I_LOSC_CTRL_KEY (0x16aa << 16)
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#define SUN6I_LOSC_CTRL_AUTO_SWT_BYPASS BIT(15)
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#define SUN6I_LOSC_CTRL_ALM_DHMS_ACC BIT(9)
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#define SUN6I_LOSC_CTRL_RTC_HMS_ACC BIT(8)
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#define SUN6I_LOSC_CTRL_RTC_YMD_ACC BIT(7)
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#define SUN6I_LOSC_CTRL_EXT_LOSC_EN BIT(4)
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#define SUN6I_LOSC_CTRL_EXT_OSC BIT(0)
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#define SUN6I_LOSC_CTRL_ACC_MASK GENMASK(9, 7)
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@ -128,6 +130,8 @@ struct sun6i_rtc_clk_data {
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unsigned int has_prescaler : 1;
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unsigned int has_out_clk : 1;
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unsigned int export_iosc : 1;
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unsigned int has_losc_en : 1;
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unsigned int has_auto_swt : 1;
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};
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struct sun6i_rtc_dev {
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@ -190,6 +194,10 @@ static int sun6i_rtc_osc_set_parent(struct clk_hw *hw, u8 index)
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val &= ~SUN6I_LOSC_CTRL_EXT_OSC;
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val |= SUN6I_LOSC_CTRL_KEY;
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val |= index ? SUN6I_LOSC_CTRL_EXT_OSC : 0;
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if (rtc->data->has_losc_en) {
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val &= ~SUN6I_LOSC_CTRL_EXT_LOSC_EN;
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val |= index ? SUN6I_LOSC_CTRL_EXT_LOSC_EN : 0;
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}
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writel(val, rtc->base + SUN6I_LOSC_CTRL);
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spin_unlock_irqrestore(&rtc->lock, flags);
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@ -215,6 +223,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
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const char *iosc_name = "rtc-int-osc";
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const char *clkout_name = "osc32k-out";
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const char *parents[2];
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u32 reg;
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rtc = kzalloc(sizeof(*rtc), GFP_KERNEL);
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if (!rtc)
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@ -235,9 +244,18 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
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goto err;
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}
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reg = SUN6I_LOSC_CTRL_KEY;
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if (rtc->data->has_auto_swt) {
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/* Bypass auto-switch to int osc, on ext losc failure */
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reg |= SUN6I_LOSC_CTRL_AUTO_SWT_BYPASS;
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writel(reg, rtc->base + SUN6I_LOSC_CTRL);
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}
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/* Switch to the external, more precise, oscillator */
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writel(SUN6I_LOSC_CTRL_KEY | SUN6I_LOSC_CTRL_EXT_OSC,
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rtc->base + SUN6I_LOSC_CTRL);
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reg |= SUN6I_LOSC_CTRL_EXT_OSC;
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if (rtc->data->has_losc_en)
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reg |= SUN6I_LOSC_CTRL_EXT_LOSC_EN;
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writel(reg, rtc->base + SUN6I_LOSC_CTRL);
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/* Yes, I know, this is ugly. */
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sun6i_rtc = rtc;
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@ -345,6 +363,23 @@ CLK_OF_DECLARE_DRIVER(sun8i_h3_rtc_clk, "allwinner,sun8i-h3-rtc",
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CLK_OF_DECLARE_DRIVER(sun50i_h5_rtc_clk, "allwinner,sun50i-h5-rtc",
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sun8i_h3_rtc_clk_init);
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static const struct sun6i_rtc_clk_data sun50i_h6_rtc_data = {
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.rc_osc_rate = 16000000,
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.fixed_prescaler = 32,
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.has_prescaler = 1,
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.has_out_clk = 1,
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.export_iosc = 1,
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.has_losc_en = 1,
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.has_auto_swt = 1,
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};
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static void __init sun50i_h6_rtc_clk_init(struct device_node *node)
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{
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sun6i_rtc_clk_init(node, &sun50i_h6_rtc_data);
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}
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CLK_OF_DECLARE_DRIVER(sun50i_h6_rtc_clk, "allwinner,sun50i-h6-rtc",
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sun50i_h6_rtc_clk_init);
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static const struct sun6i_rtc_clk_data sun8i_v3_rtc_data = {
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.rc_osc_rate = 32000,
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.has_out_clk = 1,
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@ -673,6 +708,7 @@ static const struct of_device_id sun6i_rtc_dt_ids[] = {
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{ .compatible = "allwinner,sun8i-r40-rtc" },
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{ .compatible = "allwinner,sun8i-v3-rtc" },
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{ .compatible = "allwinner,sun50i-h5-rtc" },
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{ .compatible = "allwinner,sun50i-h6-rtc" },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids);
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