powerpc/85xx: Add ucc uart support for p1025rdb
Add device tree nodes to enable ucc uart support on P1025RDB. Signed-off-by: Zhicheng Fan <B32736@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -1,7 +1,7 @@
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/*
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* P1021/P1012 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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* Copyright 2011-2012 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -213,6 +213,20 @@
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interrupt-parent = <&qeic>;
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};
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ucc@2600 {
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cell-index = <7>;
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reg = <0x2600 0x200>;
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interrupts = <42>;
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interrupt-parent = <&qeic>;
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};
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ucc@2200 {
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cell-index = <3>;
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reg = <0x2200 0x200>;
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interrupts = <34>;
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interrupt-parent = <&qeic>;
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};
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muram@10000 {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -282,5 +282,45 @@
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0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */
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0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */
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};
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pio3: ucc_pin@03 {
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pio-map = <
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/* port pin dir open_drain assignment has_irq */
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0x0 0x16 0x2 0x0 0x2 0x0 /* SER7_CD_B*/
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0x0 0x12 0x2 0x0 0x2 0x0 /* SER7_CTS_B*/
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0x0 0x13 0x1 0x0 0x2 0x0 /* SER7_RTS_B*/
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0x0 0x14 0x2 0x0 0x2 0x0 /* SER7_RXD0*/
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0x0 0x15 0x1 0x0 0x2 0x0>; /* SER7_TXD0*/
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};
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pio4: ucc_pin@04 {
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pio-map = <
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/* port pin dir open_drain assignment has_irq */
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0x1 0x0 0x2 0x0 0x2 0x0 /* SER3_CD_B*/
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0x0 0x1c 0x2 0x0 0x2 0x0 /* SER3_CTS_B*/
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0x0 0x1d 0x1 0x0 0x2 0x0 /* SER3_RTS_B*/
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0x0 0x1e 0x2 0x0 0x2 0x0 /* SER3_RXD0*/
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0x0 0x1f 0x1 0x0 0x2 0x0>; /* SER3_TXD0*/
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};
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};
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};
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&qe {
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serial2: ucc@2600 {
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device_type = "serial";
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compatible = "ucc_uart";
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port-number = <0>;
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rx-clock-name = "brg6";
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tx-clock-name = "brg6";
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pio-handle = <&pio3>;
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};
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serial3: ucc@2200 {
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device_type = "serial";
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compatible = "ucc_uart";
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port-number = <1>;
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rx-clock-name = "brg2";
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tx-clock-name = "brg2";
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pio-handle = <&pio4>;
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};
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};
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