pinctrl: tegra: debugfs enhancements
* Only provide debugfs-relates ops when CONFIG_DEBUG_FS is enabled. * Implement pin_config_group_dbg_show op. * Implement pin_config_config_dbg_show op. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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@ -83,12 +83,14 @@ static int tegra_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
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return 0;
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}
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#ifdef CONFIG_DEBUG_FS
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static void tegra_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s,
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unsigned offset)
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{
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seq_printf(s, " %s", dev_name(pctldev->dev));
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}
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#endif
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static int reserve_map(struct pinctrl_map **map, unsigned *reserved_maps,
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unsigned *num_maps, unsigned reserve)
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@ -295,7 +297,9 @@ static struct pinctrl_ops tegra_pinctrl_ops = {
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.get_groups_count = tegra_pinctrl_get_groups_count,
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.get_group_name = tegra_pinctrl_get_group_name,
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.get_group_pins = tegra_pinctrl_get_group_pins,
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#ifdef CONFIG_DEBUG_FS
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.pin_dbg_show = tegra_pinctrl_pin_dbg_show,
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#endif
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.dt_node_to_map = tegra_pinctrl_dt_node_to_map,
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.dt_free_map = tegra_pinctrl_dt_free_map,
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};
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@ -385,6 +389,7 @@ static struct pinmux_ops tegra_pinmux_ops = {
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static int tegra_pinconf_reg(struct tegra_pmx *pmx,
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const struct tegra_pingroup *g,
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enum tegra_pinconf_param param,
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bool report_err,
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s8 *bank, s16 *reg, s8 *bit, s8 *width)
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{
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switch (param) {
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@ -472,9 +477,10 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
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}
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if (*reg < 0) {
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dev_err(pmx->dev,
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"Config param %04x not supported on group %s\n",
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param, g->name);
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if (report_err)
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dev_err(pmx->dev,
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"Config param %04x not supported on group %s\n",
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param, g->name);
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return -ENOTSUPP;
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}
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@ -507,7 +513,8 @@ static int tegra_pinconf_group_get(struct pinctrl_dev *pctldev,
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g = &pmx->soc->groups[group];
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ret = tegra_pinconf_reg(pmx, g, param, &bank, ®, &bit, &width);
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ret = tegra_pinconf_reg(pmx, g, param, true, &bank, ®, &bit,
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&width);
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if (ret < 0)
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return ret;
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@ -534,7 +541,8 @@ static int tegra_pinconf_group_set(struct pinctrl_dev *pctldev,
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g = &pmx->soc->groups[group];
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ret = tegra_pinconf_reg(pmx, g, param, &bank, ®, &bit, &width);
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ret = tegra_pinconf_reg(pmx, g, param, true, &bank, ®, &bit,
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&width);
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if (ret < 0)
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return ret;
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@ -563,23 +571,78 @@ static int tegra_pinconf_group_set(struct pinctrl_dev *pctldev,
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return 0;
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}
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#ifdef CONFIG_DEBUG_FS
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static void tegra_pinconf_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned offset)
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{
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}
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static void tegra_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned selector)
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static const char *strip_prefix(const char *s)
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{
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const char *comma = strchr(s, ',');
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if (!comma)
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return s;
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return comma + 1;
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}
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static void tegra_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned group)
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{
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struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
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const struct tegra_pingroup *g;
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int i, ret;
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s8 bank, bit, width;
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s16 reg;
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u32 val;
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g = &pmx->soc->groups[group];
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for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
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ret = tegra_pinconf_reg(pmx, g, cfg_params[i].param, false,
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&bank, ®, &bit, &width);
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if (ret < 0)
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continue;
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val = pmx_readl(pmx, bank, reg);
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val >>= bit;
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val &= (1 << width) - 1;
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seq_printf(s, "\n\t%s=%u",
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strip_prefix(cfg_params[i].property), val);
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}
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}
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static void tegra_pinconf_config_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s,
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unsigned long config)
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{
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enum tegra_pinconf_param param = TEGRA_PINCONF_UNPACK_PARAM(config);
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u16 arg = TEGRA_PINCONF_UNPACK_ARG(config);
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const char *pname = "unknown";
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int i;
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for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
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if (cfg_params[i].param == param) {
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pname = cfg_params[i].property;
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break;
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}
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}
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seq_printf(s, "%s=%d", strip_prefix(pname), arg);
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}
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#endif
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struct pinconf_ops tegra_pinconf_ops = {
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.pin_config_get = tegra_pinconf_get,
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.pin_config_set = tegra_pinconf_set,
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.pin_config_group_get = tegra_pinconf_group_get,
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.pin_config_group_set = tegra_pinconf_group_set,
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#ifdef CONFIG_DEBUG_FS
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.pin_config_dbg_show = tegra_pinconf_dbg_show,
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.pin_config_group_dbg_show = tegra_pinconf_group_dbg_show,
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.pin_config_config_dbg_show = tegra_pinconf_config_dbg_show,
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#endif
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};
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static struct pinctrl_gpio_range tegra_pinctrl_gpio_range = {
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