powerpc/mm: Fix typo in comments
Fixes: 912cc87a6
"powerpc/mm/radix: Add LPID based tlb flush helpers"
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -98,7 +98,7 @@ static inline void __tlbiel_pid(unsigned long pid, int set,
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rb |= set << PPC_BITLSHIFT(51);
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rs = ((unsigned long)pid) << PPC_BITLSHIFT(31);
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prs = 1; /* process scoped */
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r = 1; /* raidx format */
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r = 1; /* radix format */
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asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1)
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: : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
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@ -112,7 +112,7 @@ static inline void __tlbie_pid(unsigned long pid, unsigned long ric)
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rb = PPC_BIT(53); /* IS = 1 */
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rs = pid << PPC_BITLSHIFT(31);
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prs = 1; /* process scoped */
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r = 1; /* raidx format */
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r = 1; /* radix format */
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asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
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: : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
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@ -164,7 +164,7 @@ static inline void __tlbiel_va(unsigned long va, unsigned long pid,
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rb |= ap << PPC_BITLSHIFT(58);
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rs = pid << PPC_BITLSHIFT(31);
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prs = 1; /* process scoped */
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r = 1; /* raidx format */
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r = 1; /* radix format */
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asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1)
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: : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
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@ -212,7 +212,7 @@ static inline void __tlbie_va(unsigned long va, unsigned long pid,
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rb |= ap << PPC_BITLSHIFT(58);
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rs = pid << PPC_BITLSHIFT(31);
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prs = 1; /* process scoped */
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r = 1; /* raidx format */
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r = 1; /* radix format */
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asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
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: : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
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@ -615,7 +615,7 @@ void radix__flush_tlb_lpid_va(unsigned long lpid, unsigned long gpa,
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rb |= ap << PPC_BITLSHIFT(58);
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rs = lpid & ((1UL << 32) - 1);
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prs = 0; /* process scoped */
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r = 1; /* raidx format */
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r = 1; /* radix format */
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asm volatile("ptesync": : :"memory");
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asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
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@ -633,7 +633,7 @@ void radix__flush_tlb_lpid(unsigned long lpid)
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rb = 0x2 << PPC_BITLSHIFT(53); /* IS = 2 */
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rs = lpid & ((1UL << 32) - 1);
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prs = 0; /* partition scoped */
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r = 1; /* raidx format */
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r = 1; /* radix format */
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asm volatile("ptesync": : :"memory");
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asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
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@ -657,7 +657,7 @@ void radix__flush_tlb_all(void)
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rb = 0x3 << PPC_BITLSHIFT(53); /* IS = 3 */
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prs = 0; /* partition scoped */
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r = 1; /* raidx format */
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r = 1; /* radix format */
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rs = 1 & ((1UL << 32) - 1); /* any LPID value to flush guest mappings */
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asm volatile("ptesync": : :"memory");
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