PCI: Enable NVIDIA HDA controllers
Many NVIDIA GPUs can be configured as either a single-function video device or a multi-function device with video at function 0 and an HDA audio controller at function 1. The HDA controller can be enabled or disabled by a bit in the function 0 config space. Some BIOSes leave the HDA disabled, which means the HDMI connector from the NVIDIA GPU may not work. Sometimes the BIOS enables the HDA if an HDMI cable is connected at boot time, but that doesn't handle hotplug cases. Enable the HDA controller on device enumeration and resume and re-read the header type, which tells us whether the GPU is a multi-function device. This quirk is limited to NVIDIA PCI devices with the VGA Controller device class. This is expected to correspond to product configurations where the NVIDIA GPU has connectors attached. Other products where the device class is 3D Controller are expected to correspond to configurations where the NVIDIA GPU is dedicated (dGPU) and has no connectors. See original post (URL below) for more details. This commit takes inspiration from an earlier patch by Daniel Drake. Link: https://lore.kernel.org/r/20190708051744.24039-1-drake@endlessm.com v2 Link: https://lore.kernel.org/r/20190613063514.15317-1-drake@endlessm.com v1 Link: https://devtalk.nvidia.com/default/topic/1024022 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75985 Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Daniel Drake <drake@endlessm.com> [bhelgaas: commit log, log message, return early if already enabled] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Aaron Plattner <aplattner@nvidia.com> Cc: Peter Wu <peter@lekensteyn.nl> Cc: Ilia Mirkin <imirkin@alum.mit.edu> Cc: Karol Herbst <kherbst@redhat.com> Cc: Maik Freudenberg <hhfeuer@gmx.de>
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@ -5011,6 +5011,36 @@ DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
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PCI_CLASS_SERIAL_UNKNOWN, 8,
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quirk_gpu_usb_typec_ucsi);
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/*
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* Enable the NVIDIA GPU integrated HDA controller if the BIOS left it
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* disabled. https://devtalk.nvidia.com/default/topic/1024022
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*/
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static void quirk_nvidia_hda(struct pci_dev *gpu)
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{
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u8 hdr_type;
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u32 val;
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/* There was no integrated HDA controller before MCP89 */
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if (gpu->device < PCI_DEVICE_ID_NVIDIA_GEFORCE_320M)
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return;
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/* Bit 25 at offset 0x488 enables the HDA controller */
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pci_read_config_dword(gpu, 0x488, &val);
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if (val & BIT(25))
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return;
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pci_info(gpu, "Enabling HDA controller\n");
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pci_write_config_dword(gpu, 0x488, val | BIT(25));
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/* The GPU becomes a multi-function device when the HDA is enabled */
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pci_read_config_byte(gpu, PCI_HEADER_TYPE, &hdr_type);
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gpu->multifunction = !!(hdr_type & 0x80);
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}
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DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
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PCI_BASE_CLASS_DISPLAY, 16, quirk_nvidia_hda);
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DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
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PCI_BASE_CLASS_DISPLAY, 16, quirk_nvidia_hda);
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/*
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* Some IDT switches incorrectly flag an ACS Source Validation error on
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* completions for config read requests even though PCIe r4.0, sec
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@ -1336,6 +1336,7 @@
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS 0x0752
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE 0x0759
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS 0x07D8
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#define PCI_DEVICE_ID_NVIDIA_GEFORCE_320M 0x08A0
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS 0x0AA2
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA 0x0D85
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