can: ti_hecc: add missing state changes
While the ti_hecc has interrupts to report when the error counters increase to a certain level and which change state it doesn't handle the case that the error counters go down again, so the reported state can actually be wrong. Since there is no interrupt for that, do update state based on the error counters, when the state is not error active and goes down again. Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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@ -711,6 +711,23 @@ static irqreturn_t ti_hecc_interrupt(int irq, void *dev_id)
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can_bus_off(ndev);
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ti_hecc_change_state(ndev, rx_state, tx_state);
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}
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} else if (unlikely(priv->can.state != CAN_STATE_ERROR_ACTIVE)) {
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enum can_state new_state, tx_state, rx_state;
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u32 rec = hecc_read(priv, HECC_CANREC);
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u32 tec = hecc_read(priv, HECC_CANTEC);
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if (rec >= 128 || tec >= 128)
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new_state = CAN_STATE_ERROR_PASSIVE;
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else if (rec >= 96 || tec >= 96)
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new_state = CAN_STATE_ERROR_WARNING;
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else
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new_state = CAN_STATE_ERROR_ACTIVE;
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if (new_state < priv->can.state) {
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rx_state = rec >= tec ? new_state : 0;
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tx_state = rec <= tec ? new_state : 0;
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ti_hecc_change_state(ndev, rx_state, tx_state);
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}
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}
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if (int_status & HECC_CANGIF_GMIF) {
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