drm/amdgpu: enable vcn3.0 for van gogh
Same as other VCN 3.0 asics. Signed-off-by: Thong Thai <thong.thai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -44,6 +44,7 @@
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#define FIRMWARE_NAVI12 "amdgpu/navi12_vcn.bin"
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#define FIRMWARE_SIENNA_CICHLID "amdgpu/sienna_cichlid_vcn.bin"
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#define FIRMWARE_NAVY_FLOUNDER "amdgpu/navy_flounder_vcn.bin"
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#define FIRMWARE_VANGOGH "amdgpu/vangogh_vcn.bin"
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MODULE_FIRMWARE(FIRMWARE_RAVEN);
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MODULE_FIRMWARE(FIRMWARE_PICASSO);
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@ -55,6 +56,7 @@ MODULE_FIRMWARE(FIRMWARE_NAVI14);
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MODULE_FIRMWARE(FIRMWARE_NAVI12);
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MODULE_FIRMWARE(FIRMWARE_SIENNA_CICHLID);
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MODULE_FIRMWARE(FIRMWARE_NAVY_FLOUNDER);
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MODULE_FIRMWARE(FIRMWARE_VANGOGH);
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static void amdgpu_vcn_idle_work_handler(struct work_struct *work);
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@ -123,6 +125,12 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
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(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
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adev->vcn.indirect_sram = true;
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break;
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case CHIP_VANGOGH:
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fw_name = FIRMWARE_VANGOGH;
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if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
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(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
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adev->vcn.indirect_sram = true;
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break;
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default:
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return -EINVAL;
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}
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@ -577,6 +577,8 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
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amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
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amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
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amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
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amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block);
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amdgpu_device_ip_block_add(adev, &jpeg_v3_0_ip_block);
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break;
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default:
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return -EINVAL;
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