ARM: tegra: Remove flow controller programming

This particular code had no effect on WFI execution. It only
asserts/de-asserts signal to tegra "legacy" CPU idle stats
monitor, which we are no longer using (cpufreq is based on
kernel s/w idle stats instead).

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Prashant Gaikwad 2012-06-05 09:44:40 +05:30 committed by Stephen Warren
parent f3d549dd5b
commit b4e395b2cb
2 changed files with 3 additions and 32 deletions

View File

@ -27,9 +27,9 @@
#include <linux/cpuidle.h>
#include <linux/hrtimer.h>
#include <mach/iomap.h>
#include <asm/proc-fns.h>
extern void tegra_cpu_wfi(void);
#include <mach/iomap.h>
static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index);
@ -64,7 +64,7 @@ static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
enter = ktime_get();
tegra_cpu_wfi();
cpu_do_idle();
exit = ktime_sub(ktime_get(), enter);
us = ktime_to_us(exit);

View File

@ -62,32 +62,3 @@
movw \reg, #:lower16:\val
movt \reg, #:upper16:\val
.endm
/*
* tegra_cpu_wfi
*
* puts current CPU in clock-gated wfi using the flow controller
*
* corrupts r0-r3
* must be called with MMU on
*/
ENTRY(tegra_cpu_wfi)
cpu_id r0
cpu_to_halt_reg r1, r0
cpu_to_csr_reg r2, r0
mov32 r0, TEGRA_FLOW_CTRL_VIRT
mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
str r3, [r0, r2] @ clear event & interrupt status
mov r3, #FLOW_CTRL_WAIT_FOR_INTERRUPT | FLOW_CTRL_JTAG_RESUME
str r3, [r0, r1] @ put flow controller in wait irq mode
dsb
wfi
mov r3, #0
str r3, [r0, r1] @ clear flow controller halt status
mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
str r3, [r0, r2] @ clear event & interrupt status
dsb
mov pc, lr
ENDPROC(tegra_cpu_wfi)