RDMA/mlx5: Remove mlx5_ib_mr->order
The is only ever set to non-zero if the MR is from the cache, and if it is cached then the order is in cached_ent->order. Make it clearer that use_umr_mtt_update() only returns true for cached MRs and remove the redundant data. Link: https://lore.kernel.org/r/20201026131936.1335664-2-leon@kernel.org Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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@ -601,7 +601,6 @@ struct mlx5_ib_mr {
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struct ib_umem *umem;
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struct ib_umem *umem;
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struct mlx5_shared_mr_info *smr_info;
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struct mlx5_shared_mr_info *smr_info;
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struct list_head list;
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struct list_head list;
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unsigned int order;
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struct mlx5_cache_ent *cache_ent;
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struct mlx5_cache_ent *cache_ent;
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int npages;
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int npages;
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struct mlx5_ib_dev *dev;
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struct mlx5_ib_dev *dev;
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@ -126,7 +126,9 @@ static int destroy_mkey(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
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static inline bool mlx5_ib_pas_fits_in_mr(struct mlx5_ib_mr *mr, u64 start,
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static inline bool mlx5_ib_pas_fits_in_mr(struct mlx5_ib_mr *mr, u64 start,
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u64 length)
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u64 length)
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{
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{
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return ((u64)1 << mr->order) * MLX5_ADAPTER_PAGE_SIZE >=
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if (!mr->cache_ent)
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return false;
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return ((u64)1 << mr->cache_ent->order) * MLX5_ADAPTER_PAGE_SIZE >=
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length + (start & (MLX5_ADAPTER_PAGE_SIZE - 1));
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length + (start & (MLX5_ADAPTER_PAGE_SIZE - 1));
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}
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}
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@ -172,7 +174,6 @@ static struct mlx5_ib_mr *alloc_cache_mr(struct mlx5_cache_ent *ent, void *mkc)
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mr = kzalloc(sizeof(*mr), GFP_KERNEL);
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mr = kzalloc(sizeof(*mr), GFP_KERNEL);
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if (!mr)
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if (!mr)
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return NULL;
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return NULL;
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mr->order = ent->order;
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mr->cache_ent = ent;
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mr->cache_ent = ent;
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mr->dev = ent->dev;
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mr->dev = ent->dev;
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