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media: dt-bindings: media: Renesas R-Car IMR bindings 

The image renderer (IMR), or the distortion correction engine, is a
drawing processor with a simple instruction system capable of referencing
video capture data or data in an external memory as the 2D texture data
and performing texture mapping and drawing with respect to any shape that
is split into triangular objects.

Document  the device tree bindings for the image renderer light extended 4
(IMR-LX4) found in the R-Car gen3 SoCs...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
Sergei Shtylyov 2019-03-26 12:12:19 -04:00 committed by Mauro Carvalho Chehab
parent 27c8e733c0
commit b4ccd7fd06
1 changed files with 31 additions and 0 deletions
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Renesas R-Car Image Renderer (Distortion Correction Engine)
-----------------------------------------------------------
The image renderer, or the distortion correction engine, is a drawing processor
with a simple instruction system capable of referencing video capture data or
data in an external memory as 2D texture data and performing texture mapping
and drawing with respect to any shape that is split into triangular objects.
Required properties:
- compatible: "renesas,<soctype>-imr-lx4", "renesas,imr-lx4" as a fallback for
the image renderer light extended 4 (IMR-LX4) found in the R-Car gen3 SoCs,
where the examples with <soctype> are:
- "renesas,r8a7795-imr-lx4" for R-Car H3,
- "renesas,r8a7796-imr-lx4" for R-Car M3-W.
- reg: offset and length of the register block;
- interrupts: single interrupt specifier;
- clocks: single clock phandle/specifier pair;
- power-domains: power domain phandle/specifier pair;
- resets: reset phandle/specifier pair.
Example:
imr-lx4@fe860000 {
compatible = "renesas,r8a7795-imr-lx4", "renesas,imr-lx4";
reg = <0 0xfe860000 0 0x2000>;
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 823>;
power-domains = <&sysc R8A7795_PD_A3VC>;
resets = <&cpg 823>;
};