ath9k: Use a single opmode variable
ah_opmode and sc_opmode are redundant. This patch removes sc_opmode. Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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6a2b9e8c8f
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b4696c8b92
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@ -855,7 +855,7 @@ bool ath9k_regd_init_channels(struct ath_hal *ah,
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u32 ath9k_hw_mhz2ieee(struct ath_hal *ah, u32 freq, u32 flags);
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enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah,
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enum ath9k_int ints);
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bool ath9k_hw_reset(struct ath_hal *ah, enum ath9k_opmode opmode,
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bool ath9k_hw_reset(struct ath_hal *ah,
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struct ath9k_channel *chan,
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enum ath9k_ht_macmode macmode,
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u8 txchainmask, u8 rxchainmask,
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@ -33,7 +33,7 @@ static int ath_beaconq_config(struct ath_softc *sc)
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struct ath9k_tx_queue_info qi;
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ath9k_hw_get_txq_props(ah, sc->sc_bhalq, &qi);
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if (sc->sc_opmode == ATH9K_M_HOSTAP) {
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if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP) {
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/* Always burst out beacon and CAB traffic. */
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qi.tqi_aifs = 1;
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qi.tqi_cwmin = 0;
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@ -85,7 +85,7 @@ static void ath_beacon_setup(struct ath_softc *sc,
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flags = ATH9K_TXDESC_NOACK;
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if (sc->sc_opmode == ATH9K_M_IBSS &&
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if (sc->sc_ah->ah_opmode == ATH9K_M_IBSS &&
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(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
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ds->ds_link = bf->bf_daddr; /* self-linked */
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flags |= ATH9K_TXDESC_VEOL;
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@ -375,7 +375,7 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id)
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struct ath_buf, list);
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list_del(&avp->av_bcbuf->list);
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if (sc->sc_opmode == ATH9K_M_HOSTAP ||
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if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
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!(sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
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int slot;
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/*
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@ -750,7 +750,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
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if (if_id != ATH_IF_ID_ANY)
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av_opmode = sc->sc_vaps[if_id]->av_opmode;
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else
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av_opmode = sc->sc_opmode;
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av_opmode = sc->sc_ah->ah_opmode;
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memzero(&conf, sizeof(struct ath_beacon_config));
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@ -770,7 +770,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
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nexttbtt = TSF_TO_TU(get_unaligned_le32(conf.u.last_tstamp + 4),
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get_unaligned_le32(conf.u.last_tstamp));
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/* XXX conditionalize multi-bss support? */
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if (sc->sc_opmode == ATH9K_M_HOSTAP) {
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if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP) {
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/*
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* For multi-bss ap support beacons are either staggered
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* evenly over N slots or burst together. For the former
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@ -791,7 +791,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
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DPRINTF(sc, ATH_DBG_BEACON, "%s: nexttbtt %u intval %u (%u)\n",
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__func__, nexttbtt, intval, conf.beacon_interval);
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/* Check for ATH9K_M_HOSTAP and sc_nostabeacons for WDS client */
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if (sc->sc_opmode == ATH9K_M_STA) {
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if (sc->sc_ah->ah_opmode == ATH9K_M_STA) {
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struct ath9k_beacon_state bs;
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u64 tsf;
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u32 tsftu;
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@ -911,7 +911,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
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ath9k_hw_set_interrupts(ah, 0);
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if (nexttbtt == intval)
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intval |= ATH9K_BEACON_RESET_TSF;
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if (sc->sc_opmode == ATH9K_M_IBSS) {
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if (sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
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/*
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* Pull nexttbtt forward to reflect the current
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* TSF .
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@ -943,7 +943,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
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if (!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
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sc->sc_imask |= ATH9K_INT_SWBA;
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ath_beaconq_config(sc);
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} else if (sc->sc_opmode == ATH9K_M_HOSTAP) {
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} else if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP) {
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/*
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* In AP mode we enable the beacon timers and
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* SWBA interrupts to prepare beacon frames.
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@ -959,7 +959,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
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* When using a self-linked beacon descriptor in
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* ibss mode load it once here.
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*/
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if (sc->sc_opmode == ATH9K_M_IBSS &&
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if (sc->sc_ah->ah_opmode == ATH9K_M_IBSS &&
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(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
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ath_beacon_start_adhoc(sc, 0);
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}
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@ -355,7 +355,7 @@ int ath_set_channel(struct ath_softc *sc, struct ath9k_channel *hchan)
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fastcc = false;
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spin_lock_bh(&sc->sc_resetlock);
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if (!ath9k_hw_reset(ah, sc->sc_opmode, hchan,
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if (!ath9k_hw_reset(ah, hchan,
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ht_macmode, sc->sc_tx_chainmask,
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sc->sc_rx_chainmask,
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sc->sc_ht_extprotspacing,
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@ -533,7 +533,8 @@ int ath_vap_listen(struct ath_softc *sc, int if_id)
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rfilt = ath_calcrxfilter(sc);
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ath9k_hw_setrxfilter(ah, rfilt);
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if (sc->sc_opmode == ATH9K_M_STA || sc->sc_opmode == ATH9K_M_IBSS) {
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if (sc->sc_ah->ah_opmode == ATH9K_M_STA ||
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sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
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memcpy(sc->sc_curbssid, ath_bcast_mac, ETH_ALEN);
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ath9k_hw_write_associd(ah, sc->sc_curbssid, sc->sc_curaid);
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} else
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@ -603,7 +604,7 @@ int ath_vap_attach(struct ath_softc *sc,
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sc->sc_vaps[if_id] = avp;
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sc->sc_nvaps++;
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/* Set the device opmode */
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sc->sc_opmode = opmode;
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sc->sc_ah->ah_opmode = opmode;
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/* default VAP configuration */
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avp->av_config.av_fixed_rateset = IEEE80211_FIXED_RATE_NONE;
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@ -677,7 +678,8 @@ int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan)
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int error = 0;
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enum ath9k_ht_macmode ht_macmode = ath_cwm_macmode(sc);
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DPRINTF(sc, ATH_DBG_CONFIG, "%s: mode %d\n", __func__, sc->sc_opmode);
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DPRINTF(sc, ATH_DBG_CONFIG, "%s: mode %d\n",
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__func__, sc->sc_ah->ah_opmode);
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/*
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* Stop anything previously setup. This is safe
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@ -702,7 +704,7 @@ int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan)
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sc->sc_curchan = *initial_chan;
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spin_lock_bh(&sc->sc_resetlock);
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if (!ath9k_hw_reset(ah, sc->sc_opmode, &sc->sc_curchan, ht_macmode,
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if (!ath9k_hw_reset(ah, &sc->sc_curchan, ht_macmode,
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sc->sc_tx_chainmask, sc->sc_rx_chainmask,
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sc->sc_ht_extprotspacing, false, &status)) {
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DPRINTF(sc, ATH_DBG_FATAL,
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@ -749,7 +751,8 @@ int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan)
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* Note we only do this (at the moment) for station mode.
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*/
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if (ath9k_hw_phycounters(ah) &&
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((sc->sc_opmode == ATH9K_M_STA) || (sc->sc_opmode == ATH9K_M_IBSS)))
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((sc->sc_ah->ah_opmode == ATH9K_M_STA) ||
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(sc->sc_ah->ah_opmode == ATH9K_M_IBSS)))
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sc->sc_imask |= ATH9K_INT_MIB;
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/*
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* Some hardware processes the TIM IE and fires an
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@ -758,7 +761,7 @@ int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan)
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* enable the TIM interrupt when operating as station.
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*/
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if ((ah->ah_caps.hw_caps & ATH9K_HW_CAP_ENHANCEDPM) &&
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(sc->sc_opmode == ATH9K_M_STA) &&
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(sc->sc_ah->ah_opmode == ATH9K_M_STA) &&
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!sc->sc_config.swBeaconProcess)
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sc->sc_imask |= ATH9K_INT_TIM;
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/*
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@ -789,7 +792,7 @@ int ath_reset(struct ath_softc *sc, bool retry_tx)
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/* Reset chip */
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spin_lock_bh(&sc->sc_resetlock);
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if (!ath9k_hw_reset(ah, sc->sc_opmode, &sc->sc_curchan,
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if (!ath9k_hw_reset(ah, &sc->sc_curchan,
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ht_macmode,
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sc->sc_tx_chainmask, sc->sc_rx_chainmask,
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sc->sc_ht_extprotspacing, false, &status)) {
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@ -1096,7 +1099,7 @@ int ath_init(u16 devid, struct ath_softc *sc)
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goto bad;
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/* default to STA mode */
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sc->sc_opmode = ATH9K_M_MONITOR;
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sc->sc_ah->ah_opmode = ATH9K_M_MONITOR;
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/* Setup rate tables */
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@ -895,15 +895,15 @@ struct ath_ht_info {
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struct ath_softc {
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struct ieee80211_hw *hw;
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struct pci_dev *pdev;
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void __iomem *mem;
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struct tasklet_struct intr_tq;
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struct tasklet_struct bcon_tasklet;
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struct ath_config sc_config; /* load-time parameters */
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int sc_debug;
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struct ath_hal *sc_ah;
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struct ath_rate_softc *sc_rc; /* tx rate control support */
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void __iomem *mem;
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int sc_debug;
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u32 sc_intrstatus;
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enum ath9k_opmode sc_opmode; /* current operating mode */
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unsigned int rx_filter;
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u8 sc_invalid; /* being detached */
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u8 sc_beacons; /* beacons running */
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@ -5839,7 +5839,7 @@ static inline bool ath9k_hw_init_cal(struct ath_hal *ah,
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}
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bool ath9k_hw_reset(struct ath_hal *ah, enum ath9k_opmode opmode,
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bool ath9k_hw_reset(struct ath_hal *ah,
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struct ath9k_channel *chan,
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enum ath9k_ht_macmode macmode,
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u8 txchainmask, u8 rxchainmask,
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@ -5953,7 +5953,7 @@ bool ath9k_hw_reset(struct ath_hal *ah, enum ath9k_opmode opmode,
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| (ah->ah_config.
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ack_6mb ? AR_STA_ID1_ACKCTS_6MB : 0)
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| ahp->ah_staId1Defaults);
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ath9k_hw_set_operating_mode(ah, opmode);
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ath9k_hw_set_operating_mode(ah, ah->ah_opmode);
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REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(ahp->ah_bssidmask));
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REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(ahp->ah_bssidmask + 4));
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@ -5983,13 +5983,11 @@ bool ath9k_hw_reset(struct ath_hal *ah, enum ath9k_opmode opmode,
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for (i = 0; i < ah->ah_caps.total_queues; i++)
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ath9k_hw_resettxqueue(ah, i);
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ath9k_hw_init_interrupt_masks(ah, opmode);
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ath9k_hw_init_interrupt_masks(ah, ah->ah_opmode);
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ath9k_hw_init_qos(ah);
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ath9k_hw_init_user_settings(ah);
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ah->ah_opmode = opmode;
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REG_WRITE(ah, AR_STA_ID1,
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REG_READ(ah, AR_STA_ID1) | AR_STA_ID1_PRESERVE_SEQNUM);
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@ -472,7 +472,8 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw,
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ath_rate_newstate(sc, avp);
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/* Reclaim beacon resources */
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if (sc->sc_opmode == ATH9K_M_HOSTAP || sc->sc_opmode == ATH9K_M_IBSS) {
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if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
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sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
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ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
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ath_beacon_return(sc, avp);
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}
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@ -184,7 +184,7 @@ static int ath_ampdu_input(struct ath_softc *sc,
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tid = qc[0] & 0xf;
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}
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if (sc->sc_opmode == ATH9K_M_STA) {
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if (sc->sc_ah->ah_opmode == ATH9K_M_STA) {
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/* Drop the frame not belonging to me. */
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if (memcmp(hdr->addr1, sc->sc_myaddr, ETH_ALEN)) {
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dev_kfree_skb(skb);
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@ -605,26 +605,26 @@ u32 ath_calcrxfilter(struct ath_softc *sc)
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| ATH9K_RX_FILTER_MCAST;
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/* If not a STA, enable processing of Probe Requests */
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if (sc->sc_opmode != ATH9K_M_STA)
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if (sc->sc_ah->ah_opmode != ATH9K_M_STA)
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rfilt |= ATH9K_RX_FILTER_PROBEREQ;
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/* Can't set HOSTAP into promiscous mode */
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if (((sc->sc_opmode != ATH9K_M_HOSTAP) &&
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if (((sc->sc_ah->ah_opmode != ATH9K_M_HOSTAP) &&
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(sc->rx_filter & FIF_PROMISC_IN_BSS)) ||
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(sc->sc_opmode == ATH9K_M_MONITOR)) {
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(sc->sc_ah->ah_opmode == ATH9K_M_MONITOR)) {
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rfilt |= ATH9K_RX_FILTER_PROM;
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/* ??? To prevent from sending ACK */
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rfilt &= ~ATH9K_RX_FILTER_UCAST;
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}
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if (((sc->sc_opmode == ATH9K_M_STA) &&
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if (((sc->sc_ah->ah_opmode == ATH9K_M_STA) &&
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(sc->rx_filter & FIF_BCN_PRBRESP_PROMISC)) ||
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(sc->sc_opmode == ATH9K_M_IBSS))
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(sc->sc_ah->ah_opmode == ATH9K_M_IBSS))
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rfilt |= ATH9K_RX_FILTER_BEACON;
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/* If in HOSTAP mode, want to enable reception of PSPOLL frames
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& beacon frames */
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if (sc->sc_opmode == ATH9K_M_HOSTAP)
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if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP)
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rfilt |= (ATH9K_RX_FILTER_BEACON | ATH9K_RX_FILTER_PSPOLL);
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return rfilt;
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@ -905,7 +905,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
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* Enable this if you want to see
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* error frames in Monitor mode.
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*/
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if (sc->sc_opmode != ATH9K_M_MONITOR)
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if (sc->sc_ah->ah_opmode != ATH9K_M_MONITOR)
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goto rx_next;
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#endif
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/* fall thru for monitor mode handling... */
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@ -950,7 +950,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
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* decryption and MIC failures. For monitor mode,
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* we also ignore the CRC error.
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*/
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if (sc->sc_opmode == ATH9K_M_MONITOR) {
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if (sc->sc_ah->ah_opmode == ATH9K_M_MONITOR) {
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if (ds->ds_rxstat.rs_status &
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~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
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ATH9K_RXERR_CRC))
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@ -1047,7 +1047,7 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc,
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* when perform internal reset in this routine.
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* Only enable reset in STA mode for now.
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*/
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if (sc->sc_opmode == ATH9K_M_STA)
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if (sc->sc_ah->ah_opmode == ATH9K_M_STA)
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needreset = 1;
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}
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} else {
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@ -1454,7 +1454,7 @@ static void ath_drain_txdataq(struct ath_softc *sc, bool retry_tx)
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"%s: Unable to stop TxDMA. Reset HAL!\n", __func__);
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spin_lock_bh(&sc->sc_resetlock);
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if (!ath9k_hw_reset(ah, sc->sc_opmode,
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if (!ath9k_hw_reset(ah,
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&sc->sc_curchan, ht_macmode,
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sc->sc_tx_chainmask, sc->sc_rx_chainmask,
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sc->sc_ht_extprotspacing, true, &status)) {
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