- fixed FP register access on Loongsoon-3
- added missing 1074 cpu handling - fixed Loongson2ef build error -----BEGIN PGP SIGNATURE----- iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAl9uMKsaHHRzYm9nZW5k QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHAm1g//flvnJaQclgZsHa1nqNyE S5oOQWNyJew2R+23YXwFIrD8y1LDbRm0DPYCYY8SGSfnS7v/HrgLndI7svMcIKFj y9Roqigqe2R6oZvVxryqlv6xuK8AwR8ZX9ZMz7H1c7SjYwA4+bJyjWDV8okdycor SRTTl8pt2mfPWV7NOE0vxH9yRXo0egPd/+T5nCqbNY65jWPU77nD9BQ3he+RUjZO gJ9IWFAkmEMpcVD3g1Nr21ioiWAs2WrRR+DkFfa6BYrcb3tRN7jEx9vbXUXxs+x5 w5/NJMt114DZZlnoZfTeMZ7XO52H+tluXzc5szGSuNMna0eddgJTKpyE+0iveEZz OECc3ZemsoM0WlCqNBl8pG6Y497nClCvHfA+eR34SUtIPpUOYggHzMMrRpxaA4mw fXsHbtxQguK+CE2F1jJ8Cz4puzqHuZCYjeiUANnePIWviHKVSlEwakgPiJCGMxV8 ySoijjp39Hhhty1rLyXloxtthNH/ANucMVK4gT5XNEKPDm5Infl8kmshNrG3YGwv EicaAs2QrXpsybj62VNZBIOqk3n+iPdkGET6mIFRYS5xJ609rmX27+BFeTgvAf1g gGewvdtIYFh71ELiVBvqRAOW3/vA1/0r7OjpatxkoO/SXrqjQXeJvz2oduWWYEtn Gp7+woHmuep+r4E7SqxFz/M= =Xhx3 -----END PGP SIGNATURE----- Merge tag 'mips_fixes_5.9_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fixes from Thomas Bogendoerfer: - fixed FP register access on Loongsoon-3 - added missing 1074 cpu handling - fixed Loongson2ef build error * tag 'mips_fixes_5.9_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: BCM47XX: Remove the needless check with the 1074K MIPS: Add the missing 'CPU_1074K' into __get_cpu_type() MIPS: Loongson2ef: Disable Loongson MMI instructions MIPS: Loongson-3: Fix fp register access if MSA enabled
This commit is contained in:
commit
b463b6f699
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@ -148,7 +148,7 @@ void __init plat_mem_setup(void)
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{
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struct cpuinfo_mips *c = ¤t_cpu_data;
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if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) {
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if (c->cputype == CPU_74K) {
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pr_info("Using bcma bus\n");
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#ifdef CONFIG_BCM47XX_BCMA
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bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
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@ -47,6 +47,7 @@ static inline int __pure __get_cpu_type(const int cpu_type)
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case CPU_34K:
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case CPU_1004K:
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case CPU_74K:
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case CPU_1074K:
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case CPU_M14KC:
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case CPU_M14KEC:
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case CPU_INTERAPTIV:
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@ -44,6 +44,10 @@ ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS
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endif
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endif
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# Some -march= flags enable MMI instructions, and GCC complains about that
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# support being enabled alongside -msoft-float. Thus explicitly disable MMI.
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cflags-y += $(call cc-option,-mno-loongson-mmi)
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#
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# Loongson Machines' Support
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#
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@ -95,10 +95,8 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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if (res)
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goto fault;
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set_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lswc2_format.rt, value);
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set_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lswc2_format.rq, value_next);
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set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0, value);
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set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0, value_next);
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compute_return_epc(regs);
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own_fpu(1);
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}
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@ -130,15 +128,13 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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goto sigbus;
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lose_fpu(1);
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value_next = get_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lswc2_format.rq);
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value_next = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0);
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StoreDW(addr + 8, value_next, res);
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if (res)
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goto fault;
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value = get_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lswc2_format.rt);
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value = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0);
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StoreDW(addr, value, res);
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if (res)
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@ -204,8 +200,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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if (res)
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goto fault;
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set_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lsdc2_format.rt, value);
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set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);
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compute_return_epc(regs);
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own_fpu(1);
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@ -221,8 +216,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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if (res)
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goto fault;
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set_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lsdc2_format.rt, value);
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set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);
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compute_return_epc(regs);
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own_fpu(1);
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break;
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@ -286,8 +280,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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goto sigbus;
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lose_fpu(1);
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value = get_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lsdc2_format.rt);
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value = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);
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StoreW(addr, value, res);
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if (res)
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@ -305,8 +298,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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goto sigbus;
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lose_fpu(1);
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value = get_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lsdc2_format.rt);
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value = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);
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StoreDW(addr, value, res);
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if (res)
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