drm/amdgpu: Checked if the pointer NULL before use it.
For SRIOV on some parts, the host driver does not post VBIOS. So the guest cannot get bios information. Therefore, adev->virt.fw_reserve.p_pf2vf and adev->mode_info.atom_context are NULL. Signed-off-by: Gavin Wan <Gavin.Wan@amd.com> Reviewed-by: Zhigang Luo <Zhigang.Luo@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -3855,21 +3855,24 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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}
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/* enable PCIE atomic ops */
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if (amdgpu_sriov_vf(adev))
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adev->have_atomics_support = ((struct amd_sriov_msg_pf2vf_info *)
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adev->virt.fw_reserve.p_pf2vf)->pcie_atomic_ops_support_flags ==
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(PCI_EXP_DEVCAP2_ATOMIC_COMP32 | PCI_EXP_DEVCAP2_ATOMIC_COMP64);
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if (amdgpu_sriov_vf(adev)) {
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if (adev->virt.fw_reserve.p_pf2vf)
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adev->have_atomics_support = ((struct amd_sriov_msg_pf2vf_info *)
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adev->virt.fw_reserve.p_pf2vf)->pcie_atomic_ops_support_flags ==
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(PCI_EXP_DEVCAP2_ATOMIC_COMP32 | PCI_EXP_DEVCAP2_ATOMIC_COMP64);
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/* APUs w/ gfx9 onwards doesn't reply on PCIe atomics, rather it is a
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* internal path natively support atomics, set have_atomics_support to true.
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*/
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else if ((adev->flags & AMD_IS_APU) &&
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(adev->ip_versions[GC_HWIP][0] > IP_VERSION(9, 0, 0)))
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} else if ((adev->flags & AMD_IS_APU) &&
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(adev->ip_versions[GC_HWIP][0] > IP_VERSION(9, 0, 0))) {
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adev->have_atomics_support = true;
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else
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} else {
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adev->have_atomics_support =
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!pci_enable_atomic_ops_to_root(adev->pdev,
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PCI_EXP_DEVCAP2_ATOMIC_COMP32 |
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PCI_EXP_DEVCAP2_ATOMIC_COMP64);
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}
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if (!adev->have_atomics_support)
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dev_info(adev->dev, "PCIE atomic ops is not supported\n");
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@ -3885,7 +3888,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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amdgpu_reset_init(adev);
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/* detect if we are with an SRIOV vbios */
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amdgpu_device_detect_sriov_bios(adev);
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if (adev->bios)
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amdgpu_device_detect_sriov_bios(adev);
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/* check if we need to reset the asic
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* E.g., driver was not cleanly unloaded previously, etc.
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