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drm/i915/guc: Replace CTB array with explicit members 

Upcoming GuC firmware will always require just two CTBs and we
also plan to configure them with different sizes, so definining
them as array is no longer suitable.

v2: Use %p for ptrdiff print
v3: Use %tx for ptrdiff print

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20210603230408.54856-1-matthew.brost@intel.com
This commit is contained in:
Michal Wajdeczko 2021-06-03 16:04:07 -07:00 committed by Daniel Vetter
parent 480c6fe120
commit b43f0fc8b8
2 changed files with 30 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

46
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
View File

@ -168,10 +168,10 @@ int intel_guc_ct_init(struct intel_guc_ct *ct)
struct intel_guc *guc = ct_to_guc(ct); struct intel_guc *guc = ct_to_guc(ct);
struct guc_ct_buffer_desc *desc; struct guc_ct_buffer_desc *desc;
u32 blob_size; u32 blob_size;
u32 cmds_size;
void *blob; void *blob;
u32 *cmds; u32 *cmds;
int err; int err;
int i;
GEM_BUG_ON(ct->vma); GEM_BUG_ON(ct->vma);
@ -207,15 +207,23 @@ int intel_guc_ct_init(struct intel_guc_ct *ct)
CT_DEBUG(ct, "base=%#x size=%u\n", intel_guc_ggtt_offset(guc, ct->vma), blob_size); CT_DEBUG(ct, "base=%#x size=%u\n", intel_guc_ggtt_offset(guc, ct->vma), blob_size);
/* store pointers to desc and cmds */ /* store pointers to desc and cmds for send ctb */
for (i = 0; i < ARRAY_SIZE(ct->ctbs); i++) { desc = blob;
GEM_BUG_ON((i != CTB_SEND) && (i != CTB_RECV)); cmds = blob + PAGE_SIZE / 2;
cmds_size = PAGE_SIZE / 4;
CT_DEBUG(ct, "%s desc %#tx cmds %#tx size %u\n", "send",
ptrdiff(desc, blob), ptrdiff(cmds, blob), cmds_size);
desc = blob + PAGE_SIZE / 4 * i; guc_ct_buffer_init(&ct->ctbs.send, desc, cmds, cmds_size);
cmds = blob + PAGE_SIZE / 4 * i + PAGE_SIZE / 2;
guc_ct_buffer_init(&ct->ctbs[i], desc, cmds, PAGE_SIZE / 4); /* store pointers to desc and cmds for recv ctb */
} desc = blob + PAGE_SIZE / 4;
cmds = blob + PAGE_SIZE / 4 + PAGE_SIZE / 2;
cmds_size = PAGE_SIZE / 4;
CT_DEBUG(ct, "%s desc %#tx cmds %#tx size %u\n", "recv",
ptrdiff(desc, blob), ptrdiff(cmds, blob), cmds_size);
guc_ct_buffer_init(&ct->ctbs.recv, desc, cmds, cmds_size);
return 0; return 0;
} }
@ -246,7 +254,6 @@ int intel_guc_ct_enable(struct intel_guc_ct *ct)
u32 base, cmds; u32 base, cmds;
void *blob; void *blob;
int err; int err;
int i;
GEM_BUG_ON(ct->enabled); GEM_BUG_ON(ct->enabled);
@ -257,28 +264,25 @@ int intel_guc_ct_enable(struct intel_guc_ct *ct)
/* blob should start with send descriptor */ /* blob should start with send descriptor */
blob = __px_vaddr(ct->vma->obj); blob = __px_vaddr(ct->vma->obj);
GEM_BUG_ON(blob != ct->ctbs[CTB_SEND].desc); GEM_BUG_ON(blob != ct->ctbs.send.desc);
/* (re)initialize descriptors */ /* (re)initialize descriptors */
for (i = 0; i < ARRAY_SIZE(ct->ctbs); i++) { cmds = base + ptrdiff(ct->ctbs.send.cmds, blob);
GEM_BUG_ON((i != CTB_SEND) && (i != CTB_RECV)); guc_ct_buffer_reset(&ct->ctbs.send, cmds);
cmds = base + ptrdiff(ct->ctbs[i].cmds, blob); cmds = base + ptrdiff(ct->ctbs.recv.cmds, blob);
CT_DEBUG(ct, "%d: cmds addr=%#x\n", i, cmds); guc_ct_buffer_reset(&ct->ctbs.recv, cmds);
guc_ct_buffer_reset(&ct->ctbs[i], cmds);
}
/* /*
* Register both CT buffers starting with RECV buffer. * Register both CT buffers starting with RECV buffer.
* Descriptors are in first half of the blob. * Descriptors are in first half of the blob.
*/ */
err = ct_register_buffer(ct, base + ptrdiff(ct->ctbs[CTB_RECV].desc, blob), err = ct_register_buffer(ct, base + ptrdiff(ct->ctbs.recv.desc, blob),
INTEL_GUC_CT_BUFFER_TYPE_RECV); INTEL_GUC_CT_BUFFER_TYPE_RECV);
if (unlikely(err)) if (unlikely(err))
goto err_out; goto err_out;
err = ct_register_buffer(ct, base + ptrdiff(ct->ctbs[CTB_SEND].desc, blob), err = ct_register_buffer(ct, base + ptrdiff(ct->ctbs.send.desc, blob),
INTEL_GUC_CT_BUFFER_TYPE_SEND); INTEL_GUC_CT_BUFFER_TYPE_SEND);
if (unlikely(err)) if (unlikely(err))
goto err_deregister; goto err_deregister;
@ -341,7 +345,7 @@ static int ct_write(struct intel_guc_ct *ct,
u32 len /* in dwords */, u32 len /* in dwords */,
u32 fence) u32 fence)
{ {
struct intel_guc_ct_buffer *ctb = &ct->ctbs[CTB_SEND]; struct intel_guc_ct_buffer *ctb = &ct->ctbs.send;
struct guc_ct_buffer_desc *desc = ctb->desc; struct guc_ct_buffer_desc *desc = ctb->desc;
u32 head = desc->head; u32 head = desc->head;
u32 tail = desc->tail; u32 tail = desc->tail;
@ -557,7 +561,7 @@ static inline bool ct_header_is_response(u32 header)
static int ct_read(struct intel_guc_ct *ct, u32 *data) static int ct_read(struct intel_guc_ct *ct, u32 *data)
{ {
struct intel_guc_ct_buffer *ctb = &ct->ctbs[CTB_RECV]; struct intel_guc_ct_buffer *ctb = &ct->ctbs.recv;
struct guc_ct_buffer_desc *desc = ctb->desc; struct guc_ct_buffer_desc *desc = ctb->desc;
u32 head = desc->head; u32 head = desc->head;
u32 tail = desc->tail; u32 tail = desc->tail;

7
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
View File

@ -47,8 +47,11 @@ struct intel_guc_ct {
struct i915_vma *vma; struct i915_vma *vma;
bool enabled; bool enabled;
/* buffers for sending(0) and receiving(1) commands */ /* buffers for sending and receiving commands */
struct intel_guc_ct_buffer ctbs[2]; struct {
struct intel_guc_ct_buffer send;
struct intel_guc_ct_buffer recv;
} ctbs;
struct { struct {
u32 last_fence; /* last fence used to send request */ u32 last_fence; /* last fence used to send request */