platform: mellanox: mlx-platform: Add reset callback
On L1 switches reset should include special actions against CPLD device for performing graceful operations. For that purpose, special PLATFORM_RESET# signal should be indicated. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-10-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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@ -35,6 +35,7 @@
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#define MLXPLAT_CPLD_LPC_REG_CPLD3_PN1_OFFSET 0x09
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#define MLXPLAT_CPLD_LPC_REG_CPLD4_PN_OFFSET 0x0a
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#define MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET 0x0b
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#define MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET 0x17
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#define MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET 0x19
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#define MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET 0x1c
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#define MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET 0x1d
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@ -254,6 +255,7 @@
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MLXPLAT_CPLD_PWM_PG_MASK)
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#define MLXPLAT_CPLD_I2C_CAP_BIT 0x04
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#define MLXPLAT_CPLD_I2C_CAP_MASK GENMASK(5, MLXPLAT_CPLD_I2C_CAP_BIT)
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#define MLXPLAT_CPLD_SYS_RESET_MASK BIT(0)
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/* Masks for aggregation for comex carriers */
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#define MLXPLAT_CPLD_AGGR_MASK_CARRIER BIT(1)
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@ -265,6 +267,7 @@
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#define MLXPLAT_CPLD_LPC_LC_MASK GENMASK(7, 0)
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#define MLXPLAT_CPLD_HALT_MASK BIT(3)
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#define MLXPLAT_CPLD_RESET_MASK GENMASK(7, 1)
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/* Default I2C parent bus number */
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#define MLXPLAT_CPLD_PHYS_ADAPTER_DEF_NR 1
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@ -441,6 +444,7 @@ static struct i2c_mux_reg_platform_data mlxplat_default_mux_data[] = {
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static int mlxplat_max_adap_num;
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static int mlxplat_mux_num;
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static struct i2c_mux_reg_platform_data *mlxplat_mux_data;
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static struct notifier_block *mlxplat_reboot_nb;
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/* Platform extended mux data */
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static struct i2c_mux_reg_platform_data mlxplat_extended_mux_data[] = {
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@ -2361,8 +2365,11 @@ static int
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mlxplat_mlxcpld_l1_switch_pwr_events_handler(void *handle, enum mlxreg_hotplug_kind kind,
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u8 action)
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{
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dev_info(&mlxplat_dev->dev, "System shutdown due to short press of power button");
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kernel_power_off();
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if (action) {
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dev_info(&mlxplat_dev->dev, "System shutdown due to short press of power button");
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kernel_power_off();
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}
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return 0;
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}
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@ -4957,6 +4964,7 @@ static struct mlxreg_core_platform_data mlxplat_mlxcpld_wd_set_type3[] = {
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static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET:
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@ -5065,6 +5073,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
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case MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_CPLD5_PN_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_CPLD5_PN1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET:
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@ -5229,6 +5238,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
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case MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_CPLD5_PN_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_CPLD5_PN1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET:
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@ -5533,11 +5543,33 @@ static struct mlxreg_core_platform_data
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*mlxplat_wd_data[MLXPLAT_CPLD_WD_MAX_DEVS];
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static const struct regmap_config *mlxplat_regmap_config;
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/* Platform default reset function */
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static int mlxplat_reboot_notifier(struct notifier_block *nb, unsigned long action, void *unused)
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{
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struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev);
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u32 regval;
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int ret;
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ret = regmap_read(priv->regmap, MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET, ®val);
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if (action == SYS_RESTART && !ret && regval & MLXPLAT_CPLD_SYS_RESET_MASK)
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regmap_write(priv->regmap, MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET,
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MLXPLAT_CPLD_RESET_MASK);
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return NOTIFY_DONE;
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}
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static struct notifier_block mlxplat_reboot_default_nb = {
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.notifier_call = mlxplat_reboot_notifier,
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};
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/* Platform default poweroff function */
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static void mlxplat_poweroff(void)
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{
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struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev);
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if (mlxplat_reboot_nb)
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unregister_reboot_notifier(mlxplat_reboot_nb);
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regmap_write(priv->regmap, MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, MLXPLAT_CPLD_HALT_MASK);
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kernel_halt();
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}
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@ -5861,6 +5893,7 @@ static int __init mlxplat_dmi_l1_switch_matched(const struct dmi_system_id *dmi)
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mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data;
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mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_rack_switch;
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pm_power_off = mlxplat_poweroff;
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mlxplat_reboot_nb = &mlxplat_reboot_default_nb;
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return 1;
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}
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@ -6410,8 +6443,15 @@ static int __init mlxplat_init(void)
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if (err)
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goto fail_regcache_sync;
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if (mlxplat_reboot_nb) {
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err = register_reboot_notifier(mlxplat_reboot_nb);
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if (err)
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goto fail_register_reboot_notifier;
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}
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return 0;
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fail_register_reboot_notifier:
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fail_regcache_sync:
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mlxplat_pre_exit(priv);
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fail_mlxplat_i2c_main_init:
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@ -6429,6 +6469,8 @@ static void __exit mlxplat_exit(void)
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if (pm_power_off)
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pm_power_off = NULL;
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if (mlxplat_reboot_nb)
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unregister_reboot_notifier(mlxplat_reboot_nb);
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mlxplat_pre_exit(priv);
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mlxplat_i2c_main_exit(priv);
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mlxplat_post_exit();
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