drm/i915: drop the double-OP_STOREDW usage in blt_ring_flush
This has been introduced in "drm/i915: TLB invalidation with MI_FLUSH_DW requires a post-sync op". Reported-by: Fengguang Wu <fengguang.wu@intel.com> Reported-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1475,7 +1475,7 @@ static int blt_ring_flush(struct intel_ring_buffer *ring,
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*/
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if (invalidate & I915_GEM_DOMAIN_RENDER)
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cmd |= MI_INVALIDATE_TLB | MI_FLUSH_DW_STORE_INDEX |
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MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_DW_OP_STOREDW;
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MI_FLUSH_DW_OP_STOREDW;
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intel_ring_emit(ring, cmd);
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intel_ring_emit(ring, I915_GEM_HWS_SCRATCH_ADDR | MI_FLUSH_DW_USE_GTT);
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intel_ring_emit(ring, 0);
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