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ARM: S3C64XX: Fix keypad setup to configure correct number of rows 

The call to s3c_gpio_cfgrange_nopull() takes a size and base
but this looks like it is trying to do base and end. This means
it is configuring too many GPIOs and on the case of the Cragganmore
means we're seeing an overflow of the ROW pins causing problems
with the keyboard driver.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Ben Dooks 2011-03-02 15:19:15 +09:00 committed by Kukjin Kim
parent 6a53048dde
commit b3f639c4fe
1 changed files with 1 additions and 1 deletions
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2
arch/arm/mach-s3c64xx/setup-keypad.c
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@ -17,7 +17,7 @@
void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
{ {
/* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */
s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3)); s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), rows, S3C_GPIO_SFN(3));
/* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */
s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3)); s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3));