scsi: ufs-mediatek: Keep VCC always-on for specific devices
For some devices which need extra delay after VCC power down, VCC shall be kept always-on in some MediaTek UFS platforms to ensure the stability of such devices because the extra delay may not be enough in those platforms. Link: https://lore.kernel.org/r/20201207054955.24366-3-stanley.chu@mediatek.com Reviewed-by: Andy Teng <andy.teng@mediatek.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -70,6 +70,13 @@ static bool ufs_mtk_is_va09_supported(struct ufs_hba *hba)
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return !!(host->caps & UFS_MTK_CAP_VA09_PWR_CTRL);
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return !!(host->caps & UFS_MTK_CAP_VA09_PWR_CTRL);
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}
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}
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static bool ufs_mtk_is_broken_vcc(struct ufs_hba *hba)
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{
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struct ufs_mtk_host *host = ufshcd_get_variant(hba);
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return !!(host->caps & UFS_MTK_CAP_BROKEN_VCC);
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}
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static void ufs_mtk_cfg_unipro_cg(struct ufs_hba *hba, bool enable)
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static void ufs_mtk_cfg_unipro_cg(struct ufs_hba *hba, bool enable)
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{
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{
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u32 tmp;
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u32 tmp;
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@ -514,6 +521,9 @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba)
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if (of_property_read_bool(np, "mediatek,ufs-disable-ah8"))
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if (of_property_read_bool(np, "mediatek,ufs-disable-ah8"))
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host->caps |= UFS_MTK_CAP_DISABLE_AH8;
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host->caps |= UFS_MTK_CAP_DISABLE_AH8;
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if (of_property_read_bool(np, "mediatek,ufs-broken-vcc"))
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host->caps |= UFS_MTK_CAP_BROKEN_VCC;
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dev_info(hba->dev, "caps: 0x%x", host->caps);
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dev_info(hba->dev, "caps: 0x%x", host->caps);
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}
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}
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@ -1003,6 +1013,17 @@ static int ufs_mtk_apply_dev_quirks(struct ufs_hba *hba)
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static void ufs_mtk_fixup_dev_quirks(struct ufs_hba *hba)
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static void ufs_mtk_fixup_dev_quirks(struct ufs_hba *hba)
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{
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{
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ufshcd_fixup_dev_quirks(hba, ufs_mtk_dev_fixups);
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ufshcd_fixup_dev_quirks(hba, ufs_mtk_dev_fixups);
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if (ufs_mtk_is_broken_vcc(hba) && hba->vreg_info.vcc &&
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(hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_AFTER_LPM)) {
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hba->vreg_info.vcc->always_on = true;
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/*
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* VCC will be kept always-on thus we don't
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* need any delay during regulator operations
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*/
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hba->dev_quirks &= ~(UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
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UFS_DEVICE_QUIRK_DELAY_AFTER_LPM);
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}
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}
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}
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static void ufs_mtk_event_notify(struct ufs_hba *hba,
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static void ufs_mtk_event_notify(struct ufs_hba *hba,
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@ -81,6 +81,7 @@ enum ufs_mtk_host_caps {
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UFS_MTK_CAP_BOOST_CRYPT_ENGINE = 1 << 0,
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UFS_MTK_CAP_BOOST_CRYPT_ENGINE = 1 << 0,
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UFS_MTK_CAP_VA09_PWR_CTRL = 1 << 1,
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UFS_MTK_CAP_VA09_PWR_CTRL = 1 << 1,
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UFS_MTK_CAP_DISABLE_AH8 = 1 << 2,
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UFS_MTK_CAP_DISABLE_AH8 = 1 << 2,
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UFS_MTK_CAP_BROKEN_VCC = 1 << 3,
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};
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};
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struct ufs_mtk_crypt_cfg {
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struct ufs_mtk_crypt_cfg {
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