[media] coda: simplify IRAM setup
OVL and BTP IRAM buffers are never used, setup the bits for for DBK/BIT/IP usage depending on CODA version in one place. Also, use a simple allocator function and group IRAM addresses and size in a coda_aux_buf structure. This is done in preparation for CODA960 support. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
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@ -135,9 +135,7 @@ struct coda_dev {
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struct coda_aux_buf tempbuf;
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struct coda_aux_buf workbuf;
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struct gen_pool *iram_pool;
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long unsigned int iram_vaddr;
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long unsigned int iram_paddr;
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unsigned long iram_size;
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struct coda_aux_buf iram;
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spinlock_t irqlock;
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struct mutex dev_mutex;
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@ -175,6 +173,8 @@ struct coda_iram_info {
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phys_addr_t buf_btp_use;
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phys_addr_t search_ram_paddr;
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int search_ram_size;
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int remaining;
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phys_addr_t next_paddr;
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};
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struct coda_ctx {
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@ -1578,23 +1578,43 @@ static int coda_h264_padding(int size, char *p)
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return nal_size;
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}
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static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
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{
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phys_addr_t ret;
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size = round_up(size, 1024);
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if (size > iram->remaining)
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return 0;
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iram->remaining -= size;
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ret = iram->next_paddr;
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iram->next_paddr += size;
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return ret;
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}
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static void coda_setup_iram(struct coda_ctx *ctx)
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{
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struct coda_iram_info *iram_info = &ctx->iram_info;
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struct coda_dev *dev = ctx->dev;
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int ipacdc_size;
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int bitram_size;
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int dbk_size;
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int ovl_size;
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int mb_width;
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int me_size;
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int size;
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int dbk_bits;
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int bit_bits;
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int ip_bits;
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memset(iram_info, 0, sizeof(*iram_info));
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size = dev->iram_size;
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iram_info->next_paddr = dev->iram.paddr;
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iram_info->remaining = dev->iram.size;
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if (dev->devtype->product == CODA_DX6)
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switch (dev->devtype->product) {
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case CODA_7541:
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dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
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bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
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ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
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break;
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default: /* CODA_DX6 */
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return;
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}
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if (ctx->inst_type == CODA_INST_ENCODER) {
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struct coda_q_data *q_data_src;
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@ -1603,111 +1623,63 @@ static void coda_setup_iram(struct coda_ctx *ctx)
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mb_width = DIV_ROUND_UP(q_data_src->width, 16);
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/* Prioritize in case IRAM is too small for everything */
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me_size = round_up(round_up(q_data_src->width, 16) * 36 + 2048,
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1024);
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iram_info->search_ram_size = me_size;
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if (size >= iram_info->search_ram_size) {
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if (dev->devtype->product == CODA_7541)
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iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE;
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iram_info->search_ram_paddr = dev->iram_paddr;
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size -= iram_info->search_ram_size;
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} else {
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pr_err("IRAM is smaller than the search ram size\n");
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goto out;
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if (dev->devtype->product == CODA_7541) {
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iram_info->search_ram_size = round_up(mb_width * 16 *
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36 + 2048, 1024);
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iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
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iram_info->search_ram_size);
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if (!iram_info->search_ram_paddr) {
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pr_err("IRAM is smaller than the search ram size\n");
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goto out;
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}
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iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
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CODA7_USE_ME_ENABLE;
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}
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/* Only H.264BP and H.263P3 are considered */
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dbk_size = round_up(128 * mb_width, 1024);
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if (size >= dbk_size) {
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iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
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iram_info->buf_dbk_y_use = dev->iram_paddr +
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iram_info->search_ram_size;
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iram_info->buf_dbk_c_use = iram_info->buf_dbk_y_use +
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dbk_size / 2;
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size -= dbk_size;
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} else {
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iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 64 * mb_width);
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iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 64 * mb_width);
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if (!iram_info->buf_dbk_c_use)
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goto out;
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}
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iram_info->axi_sram_use |= dbk_bits;
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bitram_size = round_up(128 * mb_width, 1024);
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if (size >= bitram_size) {
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iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
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iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
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dbk_size / 2;
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size -= bitram_size;
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} else {
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iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width);
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if (!iram_info->buf_bit_use)
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goto out;
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}
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iram_info->axi_sram_use |= bit_bits;
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ipacdc_size = round_up(128 * mb_width, 1024);
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if (size >= ipacdc_size) {
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iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
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iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
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bitram_size;
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size -= ipacdc_size;
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}
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iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width);
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if (!iram_info->buf_ip_ac_dc_use)
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goto out;
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iram_info->axi_sram_use |= ip_bits;
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/* OVL and BTP disabled for encoder */
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} else if (ctx->inst_type == CODA_INST_DECODER) {
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struct coda_q_data *q_data_dst;
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int mb_height;
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q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
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mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
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mb_height = DIV_ROUND_UP(q_data_dst->height, 16);
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dbk_size = round_up(256 * mb_width, 1024);
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if (size >= dbk_size) {
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iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
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iram_info->buf_dbk_y_use = dev->iram_paddr;
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iram_info->buf_dbk_c_use = dev->iram_paddr +
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dbk_size / 2;
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size -= dbk_size;
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} else {
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iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 128 * mb_width);
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iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 128 * mb_width);
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if (!iram_info->buf_dbk_c_use)
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goto out;
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}
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iram_info->axi_sram_use |= dbk_bits;
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bitram_size = round_up(128 * mb_width, 1024);
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if (size >= bitram_size) {
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iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
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iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
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dbk_size / 2;
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size -= bitram_size;
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} else {
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iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width);
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if (!iram_info->buf_bit_use)
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goto out;
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}
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iram_info->axi_sram_use |= bit_bits;
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ipacdc_size = round_up(128 * mb_width, 1024);
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if (size >= ipacdc_size) {
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iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
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iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
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bitram_size;
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size -= ipacdc_size;
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} else {
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iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width);
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if (!iram_info->buf_ip_ac_dc_use)
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goto out;
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}
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iram_info->axi_sram_use |= ip_bits;
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ovl_size = round_up(80 * mb_width, 1024);
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/* OVL and BTP unused as there is no VC1 support yet */
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}
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out:
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switch (dev->devtype->product) {
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case CODA_DX6:
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break;
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case CODA_7541:
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/* i.MX53 uses secondary AXI for IRAM access */
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if (iram_info->axi_sram_use & CODA7_USE_HOST_BIT_ENABLE)
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iram_info->axi_sram_use |= CODA7_USE_BIT_ENABLE;
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if (iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE)
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iram_info->axi_sram_use |= CODA7_USE_IP_ENABLE;
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if (iram_info->axi_sram_use & CODA7_USE_HOST_DBK_ENABLE)
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iram_info->axi_sram_use |= CODA7_USE_DBK_ENABLE;
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if (iram_info->axi_sram_use & CODA7_USE_HOST_OVL_ENABLE)
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iram_info->axi_sram_use |= CODA7_USE_OVL_ENABLE;
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if (iram_info->axi_sram_use & CODA7_USE_HOST_ME_ENABLE)
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iram_info->axi_sram_use |= CODA7_USE_ME_ENABLE;
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}
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if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
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v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
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"IRAM smaller than needed\n");
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@ -2063,7 +2035,7 @@ static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
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if (dev->devtype->product == CODA_DX6) {
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/* Configure the coda */
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coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
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coda_write(dev, dev->iram.paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
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}
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/* Could set rotation here if needed */
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@ -3296,15 +3268,15 @@ static int coda_probe(struct platform_device *pdev)
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switch (dev->devtype->product) {
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case CODA_DX6:
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dev->iram_size = CODADX6_IRAM_SIZE;
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dev->iram.size = CODADX6_IRAM_SIZE;
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break;
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case CODA_7541:
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dev->iram_size = CODA7_IRAM_SIZE;
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dev->iram.size = CODA7_IRAM_SIZE;
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break;
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}
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dev->iram_vaddr = (unsigned long)gen_pool_dma_alloc(dev->iram_pool,
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dev->iram_size, (dma_addr_t *)&dev->iram_paddr);
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if (!dev->iram_vaddr) {
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dev->iram.vaddr = gen_pool_dma_alloc(dev->iram_pool, dev->iram.size,
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&dev->iram.paddr);
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if (!dev->iram.vaddr) {
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dev_err(&pdev->dev, "unable to alloc iram\n");
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return -ENOMEM;
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}
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@ -3324,8 +3296,9 @@ static int coda_remove(struct platform_device *pdev)
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if (dev->alloc_ctx)
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vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
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v4l2_device_unregister(&dev->v4l2_dev);
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if (dev->iram_vaddr)
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gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
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if (dev->iram.vaddr)
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gen_pool_free(dev->iram_pool, (unsigned long)dev->iram.vaddr,
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dev->iram.size);
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coda_free_aux_buf(dev, &dev->codebuf);
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coda_free_aux_buf(dev, &dev->tempbuf);
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coda_free_aux_buf(dev, &dev->workbuf);
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