mt76: move queue initialization in mt76x02_mmio.c
Move mt76x02_dma_init, mt76x02_init_rx_queue and mt76x02_init_tx_queue routines in mt76x02-lib module in order to be reused by mt76x0 driver Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
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957068c23f
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b2eabd4c32
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@ -518,8 +518,8 @@ static inline u16 mt76_rev(struct mt76_dev *dev)
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#define mt76xx_chip(dev) mt76_chip(&((dev)->mt76))
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#define mt76xx_rev(dev) mt76_rev(&((dev)->mt76))
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#define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76))
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#define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__)
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#define __mt76_init_queues(dev) (dev)->queue_ops->init((dev))
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#define __mt76_queue_alloc(dev, ...) (dev)->queue_ops->alloc((dev), __VA_ARGS__)
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#define mt76_queue_add_buf(dev, ...) (dev)->mt76.queue_ops->add_buf(&((dev)->mt76), __VA_ARGS__)
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#define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__)
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#define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)
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@ -48,6 +48,9 @@
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#define MT_MCU_MSG_TYPE GENMASK(31, 30)
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#define MT_MCU_MSG_TYPE_CMD BIT(30)
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#define MT_RX_HEADROOM 32
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#define MT76X02_RX_RING_SIZE 256
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enum dma_msg_port {
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WLAN_PORT,
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CPU_RX_PORT,
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@ -67,6 +70,7 @@ mt76x02_wait_for_wpdma(struct mt76_dev *dev, int timeout)
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0, timeout);
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}
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int mt76x02_dma_init(struct mt76_dev *dev);
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void mt76x02_dma_enable(struct mt76_dev *dev);
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void mt76x02_dma_disable(struct mt76_dev *dev);
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@ -19,7 +19,92 @@
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#include "mt76.h"
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#include "mt76x02_dma.h"
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#include "mt76x02_regs.h"
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#include "mt76x02_util.h"
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#include "mt76x02_mac.h"
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static int
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mt76x02_init_tx_queue(struct mt76_dev *dev, struct mt76_queue *q,
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int idx, int n_desc)
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{
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int ret;
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q->regs = dev->mmio.regs + MT_TX_RING_BASE + idx * MT_RING_SIZE;
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q->ndesc = n_desc;
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q->hw_idx = idx;
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ret = __mt76_queue_alloc(dev, q);
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if (ret)
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return ret;
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mt76x02_irq_enable(dev, MT_INT_TX_DONE(idx));
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return 0;
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}
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static int
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mt76x02_init_rx_queue(struct mt76_dev *dev, struct mt76_queue *q,
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int idx, int n_desc, int bufsize)
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{
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int ret;
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q->regs = dev->mmio.regs + MT_RX_RING_BASE + idx * MT_RING_SIZE;
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q->ndesc = n_desc;
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q->buf_size = bufsize;
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ret = __mt76_queue_alloc(dev, q);
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if (ret)
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return ret;
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mt76x02_irq_enable(dev, MT_INT_RX_DONE(idx));
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return 0;
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}
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int mt76x02_dma_init(struct mt76_dev *dev)
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{
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struct mt76_txwi_cache __maybe_unused *t;
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struct mt76_queue *q;
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int i, ret;
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BUILD_BUG_ON(sizeof(t->txwi) < sizeof(struct mt76x02_txwi));
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BUILD_BUG_ON(sizeof(struct mt76x02_rxwi) > MT_RX_HEADROOM);
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mt76_dma_attach(dev);
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__mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
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for (i = 0; i < IEEE80211_NUM_ACS; i++) {
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ret = mt76x02_init_tx_queue(dev, &dev->q_tx[i],
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mt76_ac_to_hwq(i),
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MT_TX_RING_SIZE);
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if (ret)
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return ret;
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}
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ret = mt76x02_init_tx_queue(dev, &dev->q_tx[MT_TXQ_PSD],
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MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE);
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if (ret)
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return ret;
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ret = mt76x02_init_tx_queue(dev, &dev->q_tx[MT_TXQ_MCU],
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MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
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if (ret)
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return ret;
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ret = mt76x02_init_rx_queue(dev, &dev->q_rx[MT_RXQ_MCU], 1,
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MT_MCU_RING_SIZE, MT_RX_BUF_SIZE);
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if (ret)
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return ret;
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q = &dev->q_rx[MT_RXQ_MAIN];
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q->buf_offset = MT_RX_HEADROOM - sizeof(struct mt76x02_rxwi);
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ret = mt76x02_init_rx_queue(dev, q, 0, MT76X02_RX_RING_SIZE,
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MT_RX_BUF_SIZE);
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if (ret)
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return ret;
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return __mt76_init_queues(dev);
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}
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EXPORT_SYMBOL_GPL(mt76x02_dma_init);
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void mt76x02_set_irq_mask(struct mt76_dev *dev, u32 clear, u32 set)
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{
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@ -35,9 +35,6 @@
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#define MT7662U_FIRMWARE "mediatek/mt7662u.bin"
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#define MT7662U_ROM_PATCH "mediatek/mt7662u_rom_patch.bin"
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#define MT76x2_RX_RING_SIZE 256
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#define MT_RX_HEADROOM 32
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#define MT_MAX_CHAINS 2
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#define MT_CALIBRATE_INTERVAL HZ
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@ -165,7 +162,7 @@ int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw,
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int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level,
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u8 channel);
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int mt76x2_dma_init(struct mt76x2_dev *dev);
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void mt76x2_tx_tasklet(unsigned long data);
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void mt76x2_dma_cleanup(struct mt76x2_dev *dev);
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void mt76x2_cleanup(struct mt76x2_dev *dev);
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@ -18,46 +18,7 @@
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#include "mt76x02_dma.h"
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#include "mt76x02_util.h"
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static int
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mt76x2_init_tx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
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int idx, int n_desc)
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{
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int ret;
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q->regs = dev->mt76.mmio.regs + MT_TX_RING_BASE + idx * MT_RING_SIZE;
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q->ndesc = n_desc;
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q->hw_idx = idx;
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ret = mt76_queue_alloc(dev, q);
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if (ret)
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return ret;
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mt76x02_irq_enable(&dev->mt76, MT_INT_TX_DONE(idx));
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return 0;
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}
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static int
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mt76x2_init_rx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
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int idx, int n_desc, int bufsize)
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{
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int ret;
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q->regs = dev->mt76.mmio.regs + MT_RX_RING_BASE + idx * MT_RING_SIZE;
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q->ndesc = n_desc;
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q->buf_size = bufsize;
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ret = mt76_queue_alloc(dev, q);
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if (ret)
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return ret;
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mt76x02_irq_enable(&dev->mt76, MT_INT_RX_DONE(idx));
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return 0;
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}
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static void
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mt76x2_tx_tasklet(unsigned long data)
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void mt76x2_tx_tasklet(unsigned long data)
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{
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struct mt76x2_dev *dev = (struct mt76x2_dev *) data;
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int i;
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@ -71,53 +32,6 @@ mt76x2_tx_tasklet(unsigned long data)
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mt76x02_irq_enable(&dev->mt76, MT_INT_TX_DONE_ALL);
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}
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int mt76x2_dma_init(struct mt76x2_dev *dev)
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{
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int ret;
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int i;
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struct mt76_txwi_cache __maybe_unused *t;
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struct mt76_queue *q;
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BUILD_BUG_ON(sizeof(t->txwi) < sizeof(struct mt76x02_txwi));
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BUILD_BUG_ON(sizeof(struct mt76x02_rxwi) > MT_RX_HEADROOM);
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mt76_dma_attach(&dev->mt76);
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tasklet_init(&dev->tx_tasklet, mt76x2_tx_tasklet, (unsigned long) dev);
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mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
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for (i = 0; i < IEEE80211_NUM_ACS; i++) {
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ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[i],
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mt76_ac_to_hwq(i), MT_TX_RING_SIZE);
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if (ret)
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return ret;
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}
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ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_PSD],
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MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE);
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if (ret)
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return ret;
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ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_MCU],
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MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
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if (ret)
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return ret;
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ret = mt76x2_init_rx_queue(dev, &dev->mt76.q_rx[MT_RXQ_MCU], 1,
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MT_MCU_RING_SIZE, MT_RX_BUF_SIZE);
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if (ret)
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return ret;
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q = &dev->mt76.q_rx[MT_RXQ_MAIN];
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q->buf_offset = MT_RX_HEADROOM - sizeof(struct mt76x02_rxwi);
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ret = mt76x2_init_rx_queue(dev, q, 0, MT76x2_RX_RING_SIZE, MT_RX_BUF_SIZE);
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if (ret)
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return ret;
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return mt76_init_queues(dev);
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}
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void mt76x2_dma_cleanup(struct mt76x2_dev *dev)
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{
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tasklet_kill(&dev->tx_tasklet);
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@ -366,7 +366,7 @@ int mt76x2_init_hardware(struct mt76x2_dev *dev)
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dev->mt76.rxfilter = mt76_rr(dev, MT_RX_FILTR_CFG);
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ret = mt76x2_dma_init(dev);
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ret = mt76x02_dma_init(&dev->mt76);
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if (ret)
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return ret;
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@ -525,6 +525,7 @@ int mt76x2_register_device(struct mt76x2_dev *dev)
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if (!status_fifo)
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return -ENOMEM;
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tasklet_init(&dev->tx_tasklet, mt76x2_tx_tasklet, (unsigned long)dev);
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kfifo_init(&dev->txstatus_fifo, status_fifo, fifo_size);
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INIT_DELAYED_WORK(&dev->cal_work, mt76x2_phy_calibrate);
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INIT_DELAYED_WORK(&dev->mac_work, mt76x2_mac_work);
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