ASoC: sunxi: Use {regmap/regmap_field}_{set/clear}_bits helpers
Appropriately change calls to {regmap/regmap_field}_update_bits() with {regmap/regmap_field}_set_bits() and {regmap/regmap_field}_clear_bits() for improved readability. Signed-off-by: Li Chen <lchen@ambarella.com> Link: https://lore.kernel.org/r/180eef50e96.cb7c34db60740.8898768158778553647@zohomail.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
f67be8b7ee
commit
b23662406b
|
@ -250,37 +250,33 @@ struct sun4i_codec {
|
|||
static void sun4i_codec_start_playback(struct sun4i_codec *scodec)
|
||||
{
|
||||
/* Flush TX FIFO */
|
||||
regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
|
||||
regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
|
||||
|
||||
/* Enable DAC DRQ */
|
||||
regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
|
||||
regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
|
||||
}
|
||||
|
||||
static void sun4i_codec_stop_playback(struct sun4i_codec *scodec)
|
||||
{
|
||||
/* Disable DAC DRQ */
|
||||
regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
|
||||
0);
|
||||
regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
|
||||
}
|
||||
|
||||
static void sun4i_codec_start_capture(struct sun4i_codec *scodec)
|
||||
{
|
||||
/* Enable ADC DRQ */
|
||||
regmap_field_update_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN),
|
||||
regmap_field_set_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
|
||||
}
|
||||
|
||||
static void sun4i_codec_stop_capture(struct sun4i_codec *scodec)
|
||||
{
|
||||
/* Disable ADC DRQ */
|
||||
regmap_field_update_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN), 0);
|
||||
regmap_field_clear_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
|
||||
}
|
||||
|
||||
static int sun4i_codec_trigger(struct snd_pcm_substream *substream, int cmd,
|
||||
|
@ -323,8 +319,7 @@ static int sun4i_codec_prepare_capture(struct snd_pcm_substream *substream,
|
|||
|
||||
|
||||
/* Flush RX FIFO */
|
||||
regmap_field_update_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH),
|
||||
regmap_field_set_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH));
|
||||
|
||||
|
||||
|
@ -365,8 +360,7 @@ static int sun4i_codec_prepare_playback(struct snd_pcm_substream *substream,
|
|||
u32 val;
|
||||
|
||||
/* Flush the TX FIFO */
|
||||
regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
|
||||
regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
|
||||
|
||||
/* Set TX FIFO Empty Trigger Level */
|
||||
|
@ -386,9 +380,8 @@ static int sun4i_codec_prepare_playback(struct snd_pcm_substream *substream,
|
|||
val);
|
||||
|
||||
/* Send zeros when we have an underrun */
|
||||
regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT),
|
||||
0);
|
||||
regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT));
|
||||
|
||||
return 0;
|
||||
};
|
||||
|
@ -485,33 +478,27 @@ static int sun4i_codec_hw_params_capture(struct sun4i_codec *scodec,
|
|||
|
||||
/* Set the number of channels we want to use */
|
||||
if (params_channels(params) == 1)
|
||||
regmap_field_update_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),
|
||||
regmap_field_set_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));
|
||||
else
|
||||
regmap_field_update_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),
|
||||
0);
|
||||
regmap_field_clear_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));
|
||||
|
||||
/* Set the number of sample bits to either 16 or 24 bits */
|
||||
if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
|
||||
regmap_field_update_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS),
|
||||
regmap_field_set_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));
|
||||
|
||||
regmap_field_update_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE),
|
||||
0);
|
||||
regmap_field_clear_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));
|
||||
|
||||
scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
|
||||
} else {
|
||||
regmap_field_update_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS),
|
||||
0);
|
||||
regmap_field_clear_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));
|
||||
|
||||
/* Fill most significant bits with valid data MSB */
|
||||
regmap_field_update_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE),
|
||||
regmap_field_set_bits(scodec->reg_adc_fifoc,
|
||||
BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));
|
||||
|
||||
scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
|
||||
|
@ -543,24 +530,20 @@ static int sun4i_codec_hw_params_playback(struct sun4i_codec *scodec,
|
|||
|
||||
/* Set the number of sample bits to either 16 or 24 bits */
|
||||
if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
|
||||
regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
|
||||
regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
|
||||
|
||||
/* Set TX FIFO mode to padding the LSBs with 0 */
|
||||
regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
|
||||
0);
|
||||
regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
|
||||
|
||||
scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
|
||||
} else {
|
||||
regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
|
||||
0);
|
||||
regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
|
||||
|
||||
/* Set TX FIFO mode to repeat the MSB */
|
||||
regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
|
||||
regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
|
||||
|
||||
scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
|
||||
|
@ -624,8 +607,7 @@ static int sun4i_codec_startup(struct snd_pcm_substream *substream,
|
|||
* Stop issuing DRQ when we have room for less than 16 samples
|
||||
* in our TX FIFO
|
||||
*/
|
||||
regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT,
|
||||
regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
|
||||
3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT);
|
||||
|
||||
return clk_prepare_enable(scodec->clk_module);
|
||||
|
|
Loading…
Reference in New Issue