drm/amd/display: Refactor HDCP to handle multiple displays per link
[Why] We need to do this to support HDCP over MST Currently we save a display per link, in a MST case we need to save multiple displays per link. [How] We can create an array per link to cache the displays, but it complicates the design. Instead we can use the module to cache the displays. Now we will always add all the displays to the module, but we use the adjustment flag to disable hdcp on all of them before they are added. When we want to enable hdcp we just query the display(cache), remove it then add it back with different adjustments. Its the similar for disable. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -5867,20 +5867,6 @@ static bool is_content_protection_different(struct drm_connector_state *state,
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return false;
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}
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static void update_content_protection(struct drm_connector_state *state, const struct drm_connector *connector,
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struct hdcp_workqueue *hdcp_w)
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{
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struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
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bool disable_type1 = state->hdcp_content_type == DRM_MODE_HDCP_CONTENT_TYPE0 ? true : false;
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if (state->content_protection == DRM_MODE_CONTENT_PROTECTION_DESIRED) {
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hdcp_reset_display(hdcp_w, aconnector->dc_link->link_index);
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hdcp_add_display(hdcp_w, aconnector->dc_link->link_index, aconnector, disable_type1);
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} else if (state->content_protection == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
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hdcp_remove_display(hdcp_w, aconnector->dc_link->link_index, aconnector->base.index);
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}
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}
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#endif
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static void remove_stream(struct amdgpu_device *adev,
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struct amdgpu_crtc *acrtc,
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@ -6850,7 +6836,11 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
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}
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if (is_content_protection_different(new_con_state, old_con_state, connector, adev->dm.hdcp_workqueue))
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update_content_protection(new_con_state, connector, adev->dm.hdcp_workqueue);
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hdcp_update_display(
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adev->dm.hdcp_workqueue, aconnector->dc_link->link_index, aconnector,
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new_con_state->hdcp_content_type == DRM_MODE_HDCP_CONTENT_TYPE0 ? true : false,
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new_con_state->content_protection == DRM_MODE_CONTENT_PROTECTION_DESIRED ? true
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: false);
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}
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#endif
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@ -87,43 +87,45 @@ static void process_output(struct hdcp_workqueue *hdcp_work)
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}
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void hdcp_add_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index, struct amdgpu_dm_connector *aconnector,
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bool disable_type1)
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void hdcp_update_display(struct hdcp_workqueue *hdcp_work,
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unsigned int link_index,
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struct amdgpu_dm_connector *aconnector,
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bool disable_type1,
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bool enable_encryption)
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{
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struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
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struct mod_hdcp_display *display = &hdcp_work[link_index].display;
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struct mod_hdcp_link *link = &hdcp_work[link_index].link;
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struct mod_hdcp_display_query query;
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mutex_lock(&hdcp_w->mutex);
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hdcp_w->aconnector = aconnector;
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hdcp_w->link.adjust.hdcp2.disable_type1 = disable_type1;
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query.display = NULL;
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mod_hdcp_query_display(&hdcp_w->hdcp, aconnector->base.index, &query);
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if (query.display != NULL) {
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memcpy(display, query.display, sizeof(struct mod_hdcp_display));
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mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);
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if (enable_encryption) {
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display->adjust.disable = 0;
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hdcp_w->link.adjust.hdcp2.disable_type1 = disable_type1;
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schedule_delayed_work(&hdcp_w->property_validate_dwork,
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msecs_to_jiffies(DRM_HDCP_CHECK_PERIOD_MS));
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} else {
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display->adjust.disable = 1;
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hdcp_w->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
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cancel_delayed_work(&hdcp_w->property_validate_dwork);
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}
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display->state = MOD_HDCP_DISPLAY_ACTIVE;
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}
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mod_hdcp_add_display(&hdcp_w->hdcp, link, display, &hdcp_w->output);
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schedule_delayed_work(&hdcp_w->property_validate_dwork, msecs_to_jiffies(DRM_HDCP_CHECK_PERIOD_MS));
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process_output(hdcp_w);
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mutex_unlock(&hdcp_w->mutex);
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}
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void hdcp_remove_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index, unsigned int display_index)
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{
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struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
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mutex_lock(&hdcp_w->mutex);
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mod_hdcp_remove_display(&hdcp_w->hdcp, display_index, &hdcp_w->output);
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cancel_delayed_work(&hdcp_w->property_validate_dwork);
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hdcp_w->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
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process_output(hdcp_w);
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mutex_unlock(&hdcp_w->mutex);
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}
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void hdcp_reset_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
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@ -303,7 +305,10 @@ static void update_config(void *handle, struct cp_psp_stream_config *config)
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link->dig_be = config->link_enc_inst;
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link->ddc_line = aconnector->dc_link->ddc_hw_inst + 1;
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link->dp.rev = aconnector->dc_link->dpcd_caps.dpcd_rev.raw;
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display->adjust.disable = 1;
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link->adjust.auth_delay = 2;
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hdcp_update_display(hdcp_work, link_index, aconnector, false, false);
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}
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struct hdcp_workqueue *hdcp_create_workqueue(void *psp_context, struct cp_psp *cp_psp, struct dc *dc)
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@ -54,9 +54,12 @@ struct hdcp_workqueue {
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uint8_t max_link;
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};
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void hdcp_add_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index, struct amdgpu_dm_connector *aconnector,
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bool disable_type1);
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void hdcp_remove_display(struct hdcp_workqueue *work, unsigned int link_index, unsigned int display_index);
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void hdcp_update_display(struct hdcp_workqueue *hdcp_work,
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unsigned int link_index,
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struct amdgpu_dm_connector *aconnector,
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bool disable_type1,
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bool enable_encryption);
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void hdcp_reset_display(struct hdcp_workqueue *work, unsigned int link_index);
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void hdcp_handle_cpirq(struct hdcp_workqueue *work, unsigned int link_index);
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void hdcp_destroy(struct hdcp_workqueue *work);
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