clk: imx: Rework all clk_hw_register_divider wrappers
Instead of having multiple inline functions that were calling clk_hw_register_divider, implement a generic low-level __imx_clk_hw_divider and implement the rest as macros that pass on as arguments whatever is needed in each case. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Link: https://lore.kernel.org/r/1631521490-17171-7-git-send-email-abel.vesa@nxp.com Reviewed-by: Stephen Boyd <sboyd@kernel.org>
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@ -175,6 +175,16 @@ extern struct imx_pll14xx_clk imx_1443x_dram_pll;
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#define imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \
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__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, flags | CLK_OPS_PARENT_ENABLE, 0)
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#define imx_clk_hw_divider(name, parent, reg, shift, width) \
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__imx_clk_hw_divider(name, parent, reg, shift, width, CLK_SET_RATE_PARENT)
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#define imx_clk_hw_divider2(name, parent, reg, shift, width) \
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__imx_clk_hw_divider(name, parent, reg, shift, width, \
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CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE)
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#define imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags) \
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__imx_clk_hw_divider(name, parent, reg, shift, width, flags)
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struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name,
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const char *parent_name, void __iomem *base,
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const struct imx_pll14xx_clk *pll_clk);
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@ -303,16 +313,7 @@ static inline struct clk_hw *imx_clk_hw_fixed_factor(const char *name,
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CLK_SET_RATE_PARENT, mult, div);
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}
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static inline struct clk_hw *imx_clk_hw_divider(const char *name,
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const char *parent,
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void __iomem *reg, u8 shift,
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u8 width)
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{
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return clk_hw_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
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reg, shift, width, 0, &imx_ccm_lock);
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}
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static inline struct clk_hw *imx_clk_hw_divider_flags(const char *name,
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static inline struct clk_hw *__imx_clk_hw_divider(const char *name,
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const char *parent,
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void __iomem *reg, u8 shift,
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u8 width, unsigned long flags)
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@ -321,14 +322,6 @@ static inline struct clk_hw *imx_clk_hw_divider_flags(const char *name,
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reg, shift, width, 0, &imx_ccm_lock);
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}
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static inline struct clk_hw *imx_clk_hw_divider2(const char *name, const char *parent,
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void __iomem *reg, u8 shift, u8 width)
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{
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return clk_hw_register_divider(NULL, name, parent,
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CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
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reg, shift, width, 0, &imx_ccm_lock);
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}
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static inline struct clk_hw *__imx_clk_hw_gate(const char *name, const char *parent,
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void __iomem *reg, u8 shift,
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unsigned long flags,
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