powerpc/83xx: new board support: MPC8360E-RDK
This is patch adds board file, device tree, and defconfig for the new
board, made by Freescale Semiconductor Inc. and Logic Product Development.
Currently supported:
1. UEC{1,2,7,4};
2. I2C;
3. SPI;
4. NS16550 serial;
5. PCI and miniPCI;
6. Intel NOR StrataFlash X16 64Mbit PC28F640P30T85;
7. Graphics controller, Fujitsu MB86277.
Not supported in this patch:
1. StMICRO NAND512W3A2BN6E, 512 Mbit (supported with FSL UPM NAND driver);
2. FHCI USB (supported with FHCI driver).
3. QE Serial UCCs (tested to not work with ucc_uart driver, reason
unknown, yet);
4. ADC AD7843 (tested to work, but support via device tree depends on
major SPI rework, GPIO API, etc);
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Anton Vorontsov
Kumar Gala
parent
32def337aa
commit
b13e930906
|
|
@ -0,0 +1,397 @@
|
|||
/*
|
||||
* MPC8360E RDK Device Tree Source
|
||||
*
|
||||
* Copyright 2006 Freescale Semiconductor Inc.
|
||||
* Copyright 2007-2008 MontaVista Software, Inc.
|
||||
*
|
||||
* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8360rdk";
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
serial2 = &serial2;
|
||||
serial3 = &serial3;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
ethernet3 = &enet3;
|
||||
pci0 = &pci0;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8360@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
d-cache-line-size = <32>;
|
||||
i-cache-line-size = <32>;
|
||||
d-cache-size = <32768>;
|
||||
i-cache-size = <32768>;
|
||||
/* filled by u-boot */
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
/* filled by u-boot */
|
||||
reg = <0 0>;
|
||||
};
|
||||
|
||||
soc@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc",
|
||||
"simple-bus";
|
||||
ranges = <0 0xe0000000 0x200000>;
|
||||
reg = <0xe0000000 0x200>;
|
||||
/* filled by u-boot */
|
||||
bus-frequency = <0>;
|
||||
|
||||
wdt@200 {
|
||||
compatible = "mpc83xx_wdt";
|
||||
reg = <0x200 0x100>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <14 8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <16 8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
interrupts = <9 8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
/* filled by u-boot */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
interrupts = <10 8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
/* filled by u-boot */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec2-crypto";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <11 8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
num-channels = <4>;
|
||||
channel-fifo-len = <24>;
|
||||
exec-units-mask = <0x7e>;
|
||||
/*
|
||||
* desc mask is for rev1.x, we need runtime fixup
|
||||
* for >=2.x
|
||||
*/
|
||||
descriptor-types-mask = <0x1010ebf>;
|
||||
};
|
||||
|
||||
ipic: interrupt-controller@700 {
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "fsl,pq2pro-pic", "fsl,ipic";
|
||||
interrupt-controller;
|
||||
reg = <0x700 0x100>;
|
||||
};
|
||||
|
||||
qe_pio_b: gpio-controller@1418 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "fsl,mpc8360-qe-pario-bank",
|
||||
"fsl,mpc8323-qe-pario-bank";
|
||||
reg = <0x1418 0x18>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
qe_pio_e: gpio-controller@1460 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "fsl,mpc8360-qe-pario-bank",
|
||||
"fsl,mpc8323-qe-pario-bank";
|
||||
reg = <0x1460 0x18>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
qe@100000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "qe";
|
||||
compatible = "fsl,qe", "simple-bus";
|
||||
ranges = <0 0x100000 0x100000>;
|
||||
reg = <0x100000 0x480>;
|
||||
/* filled by u-boot */
|
||||
clock-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
brg-frequency = <0>;
|
||||
|
||||
muram@10000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,qe-muram", "fsl,cpm-muram";
|
||||
ranges = <0 0x10000 0xc000>;
|
||||
|
||||
data-only@0 {
|
||||
compatible = "fsl,qe-muram-data",
|
||||
"fsl,cpm-muram-data";
|
||||
reg = <0 0xc000>;
|
||||
};
|
||||
};
|
||||
|
||||
timer@440 {
|
||||
compatible = "fsl,mpc8360-qe-gtm",
|
||||
"fsl,qe-gtm", "fsl,gtm";
|
||||
reg = <0x440 0x40>;
|
||||
interrupts = <12 13 14 15>;
|
||||
interrupt-parent = <&qeic>;
|
||||
/* filled by u-boot */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
spi@4c0 {
|
||||
cell-index = <0>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <0x4c0 0x40>;
|
||||
interrupts = <2>;
|
||||
interrupt-parent = <&qeic>;
|
||||
mode = "cpu-qe";
|
||||
};
|
||||
|
||||
spi@500 {
|
||||
cell-index = <1>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <0x500 0x40>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&qeic>;
|
||||
mode = "cpu-qe";
|
||||
};
|
||||
|
||||
enet0: ucc@2000 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <1>;
|
||||
reg = <0x2000 0x200>;
|
||||
interrupts = <32>;
|
||||
interrupt-parent = <&qeic>;
|
||||
rx-clock-name = "none";
|
||||
tx-clock-name = "clk9";
|
||||
phy-handle = <&phy2>;
|
||||
phy-connection-type = "rgmii-rxid";
|
||||
/* filled by u-boot */
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
};
|
||||
|
||||
enet1: ucc@3000 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <2>;
|
||||
reg = <0x3000 0x200>;
|
||||
interrupts = <33>;
|
||||
interrupt-parent = <&qeic>;
|
||||
rx-clock-name = "none";
|
||||
tx-clock-name = "clk4";
|
||||
phy-handle = <&phy4>;
|
||||
phy-connection-type = "rgmii-rxid";
|
||||
/* filled by u-boot */
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
};
|
||||
|
||||
enet2: ucc@2600 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <7>;
|
||||
reg = <0x2600 0x200>;
|
||||
interrupts = <42>;
|
||||
interrupt-parent = <&qeic>;
|
||||
rx-clock-name = "clk20";
|
||||
tx-clock-name = "clk19";
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "mii";
|
||||
/* filled by u-boot */
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
};
|
||||
|
||||
enet3: ucc@3200 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <4>;
|
||||
reg = <0x3200 0x200>;
|
||||
interrupts = <35>;
|
||||
interrupt-parent = <&qeic>;
|
||||
rx-clock-name = "clk8";
|
||||
tx-clock-name = "clk7";
|
||||
phy-handle = <&phy3>;
|
||||
phy-connection-type = "mii";
|
||||
/* filled by u-boot */
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
};
|
||||
|
||||
mdio@2120 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,ucc-mdio";
|
||||
reg = <0x2120 0x18>;
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
device_type = "ethernet-phy";
|
||||
compatible = "national,DP83848VV";
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
device_type = "ethernet-phy";
|
||||
compatible = "broadcom,BCM5481UA2KMLG";
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
device_type = "ethernet-phy";
|
||||
compatible = "national,DP83848VV";
|
||||
reg = <3>;
|
||||
};
|
||||
|
||||
phy4: ethernet-phy@4 {
|
||||
device_type = "ethernet-phy";
|
||||
compatible = "broadcom,BCM5481UA2KMLG";
|
||||
reg = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
serial2: ucc@2400 {
|
||||
device_type = "serial";
|
||||
compatible = "ucc_uart";
|
||||
reg = <0x2400 0x200>;
|
||||
cell-index = <5>;
|
||||
port-number = <0>;
|
||||
rx-clock-name = "brg7";
|
||||
tx-clock-name = "brg8";
|
||||
interrupts = <40>;
|
||||
interrupt-parent = <&qeic>;
|
||||
soft-uart;
|
||||
};
|
||||
|
||||
serial3: ucc@3400 {
|
||||
device_type = "serial";
|
||||
compatible = "ucc_uart";
|
||||
reg = <0x3400 0x200>;
|
||||
cell-index = <6>;
|
||||
port-number = <1>;
|
||||
rx-clock-name = "brg13";
|
||||
tx-clock-name = "brg14";
|
||||
interrupts = <41>;
|
||||
interrupt-parent = <&qeic>;
|
||||
soft-uart;
|
||||
};
|
||||
|
||||
qeic: interrupt-controller@80 {
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "fsl,qe-ic";
|
||||
interrupt-controller;
|
||||
reg = <0x80 0x80>;
|
||||
big-endian;
|
||||
interrupts = <32 8 33 8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
localbus@e0005000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
|
||||
"simple-bus";
|
||||
reg = <0xe0005000 0xd8>;
|
||||
ranges = <0 0 0xff800000 0x0800000
|
||||
1 0 0x60000000 0x0001000
|
||||
2 0 0x70000000 0x4000000>;
|
||||
|
||||
flash@0,0 {
|
||||
compatible = "intel,PC28F640P30T85", "cfi-flash";
|
||||
reg = <0 0 0x800000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
};
|
||||
|
||||
display@2,0 {
|
||||
device_type = "display";
|
||||
compatible = "fujitsu,MB86277", "fujitsu,mint";
|
||||
reg = <2 0 0x4000000>;
|
||||
fujitsu,sh3;
|
||||
little-endian;
|
||||
/* filled by u-boot */
|
||||
address = <0>;
|
||||
depth = <0>;
|
||||
width = <0>;
|
||||
height = <0>;
|
||||
linebytes = <0>;
|
||||
/* linux,opened; - added by uboot */
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pci@e0008500 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
device_type = "pci";
|
||||
compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci";
|
||||
reg = <0xe0008500 0x100>;
|
||||
ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
|
||||
0x42000000 0 0x80000000 0x80000000 0 0x10000000
|
||||
0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>;
|
||||
interrupts = <66 8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */
|
||||
0xa000 0 0 1 &ipic 18 8
|
||||
0xa000 0 0 2 &ipic 19 8
|
||||
|
||||
/* PCI1 IDSEL 0x15 AD21 */
|
||||
0xa800 0 0 1 &ipic 19 8
|
||||
0xa800 0 0 2 &ipic 20 8
|
||||
0xa800 0 0 3 &ipic 21 8
|
||||
0xa800 0 0 4 &ipic 18 8>;
|
||||
/* filled by u-boot */
|
||||
bus-range = <0 0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -58,6 +58,17 @@ config MPC836x_MDS
|
|||
help
|
||||
This option enables support for the MPC836x MDS Processor Board.
|
||||
|
||||
config MPC836x_RDK
|
||||
bool "Freescale/Logic MPC836x RDK"
|
||||
select DEFAULT_UIMAGE
|
||||
select QUICC_ENGINE
|
||||
select QE_GPIO
|
||||
select FSL_GTM
|
||||
select FSL_LBC
|
||||
help
|
||||
This option enables support for the MPC836x RDK Processor Board,
|
||||
also known as ZOOM PowerQUICC Kit.
|
||||
|
||||
config MPC837x_MDS
|
||||
bool "Freescale MPC837x MDS"
|
||||
select DEFAULT_UIMAGE
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@ obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o
|
|||
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
|
||||
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
|
||||
obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o
|
||||
obj-$(CONFIG_MPC836x_RDK) += mpc836x_rdk.o
|
||||
obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o
|
||||
obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o
|
||||
obj-$(CONFIG_SBC834x) += sbc834x.o
|
||||
|
|
|
|||
|
|
@ -0,0 +1,102 @@
|
|||
/*
|
||||
* MPC8360E-RDK board file.
|
||||
*
|
||||
* Copyright (c) 2006 Freescale Semicondutor, Inc.
|
||||
* Copyright (c) 2007-2008 MontaVista Software, Inc.
|
||||
*
|
||||
* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/io.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/ipic.h>
|
||||
#include <asm/udbg.h>
|
||||
#include <asm/qe.h>
|
||||
#include <asm/qe_ic.h>
|
||||
#include <sysdev/fsl_soc.h>
|
||||
|
||||
#include "mpc83xx.h"
|
||||
|
||||
static struct of_device_id __initdata mpc836x_rdk_ids[] = {
|
||||
{ .compatible = "simple-bus", },
|
||||
{},
|
||||
};
|
||||
|
||||
static int __init mpc836x_rdk_declare_of_platform_devices(void)
|
||||
{
|
||||
return of_platform_bus_probe(NULL, mpc836x_rdk_ids, NULL);
|
||||
}
|
||||
machine_device_initcall(mpc836x_rdk, mpc836x_rdk_declare_of_platform_devices);
|
||||
|
||||
static void __init mpc836x_rdk_setup_arch(void)
|
||||
{
|
||||
#ifdef CONFIG_PCI
|
||||
struct device_node *np;
|
||||
#endif
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc836x_rdk_setup_arch()", 0);
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
|
||||
mpc83xx_add_bridge(np);
|
||||
#endif
|
||||
|
||||
qe_reset();
|
||||
}
|
||||
|
||||
static void __init mpc836x_rdk_init_IRQ(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
|
||||
if (!np)
|
||||
return;
|
||||
|
||||
ipic_init(np, 0);
|
||||
|
||||
/*
|
||||
* Initialize the default interrupt mapping priorities,
|
||||
* in case the boot rom changed something on us.
|
||||
*/
|
||||
ipic_set_default_priority();
|
||||
of_node_put(np);
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
|
||||
if (!np)
|
||||
return;
|
||||
|
||||
qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
/*
|
||||
* Called very early, MMU is off, device-tree isn't unflattened.
|
||||
*/
|
||||
static int __init mpc836x_rdk_probe(void)
|
||||
{
|
||||
unsigned long root = of_get_flat_dt_root();
|
||||
|
||||
return of_flat_dt_is_compatible(root, "fsl,mpc8360rdk");
|
||||
}
|
||||
|
||||
define_machine(mpc836x_rdk) {
|
||||
.name = "MPC836x RDK",
|
||||
.probe = mpc836x_rdk_probe,
|
||||
.setup_arch = mpc836x_rdk_setup_arch,
|
||||
.init_IRQ = mpc836x_rdk_init_IRQ,
|
||||
.get_irq = ipic_get_irq,
|
||||
.restart = mpc83xx_restart,
|
||||
.time_init = mpc83xx_time_init,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.progress = udbg_progress,
|
||||
};
|
||||
Loading…
Reference in New Issue