drm/i915: Stop using crtc->index as the pipe
The pipe crc code slipped theough the net when we tried to eliminate all crtc->index==pipe abuses. Remedy that. And while at it get rid of those nasty intel_crtc+drm_crtc pointer aliases. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210426185612.13223-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
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@ -580,13 +580,14 @@ int intel_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name,
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return -EINVAL;
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}
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int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name)
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int intel_crtc_set_crc_source(struct drm_crtc *_crtc, const char *source_name)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc->dev);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_pipe_crc *pipe_crc = &intel_crtc->pipe_crc;
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struct intel_crtc *crtc = to_intel_crtc(_crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
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enum intel_display_power_domain power_domain;
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enum intel_pipe_crc_source source;
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enum pipe pipe = crtc->pipe;
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intel_wakeref_t wakeref;
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u32 val = 0; /* shut up gcc */
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int ret = 0;
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@ -597,7 +598,7 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name)
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return -EINVAL;
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}
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power_domain = POWER_DOMAIN_PIPE(crtc->index);
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power_domain = POWER_DOMAIN_PIPE(pipe);
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wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
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if (!wakeref) {
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drm_dbg_kms(&dev_priv->drm,
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@ -607,64 +608,64 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name)
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enable = source != INTEL_PIPE_CRC_SOURCE_NONE;
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if (enable)
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intel_crtc_crc_setup_workarounds(to_intel_crtc(crtc), true);
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intel_crtc_crc_setup_workarounds(crtc, true);
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ret = get_new_crc_ctl_reg(dev_priv, crtc->index, &source, &val);
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ret = get_new_crc_ctl_reg(dev_priv, pipe, &source, &val);
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if (ret != 0)
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goto out;
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pipe_crc->source = source;
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intel_de_write(dev_priv, PIPE_CRC_CTL(crtc->index), val);
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intel_de_posting_read(dev_priv, PIPE_CRC_CTL(crtc->index));
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intel_de_write(dev_priv, PIPE_CRC_CTL(pipe), val);
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intel_de_posting_read(dev_priv, PIPE_CRC_CTL(pipe));
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if (!source) {
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if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
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vlv_undo_pipe_scramble_reset(dev_priv, crtc->index);
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vlv_undo_pipe_scramble_reset(dev_priv, pipe);
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}
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pipe_crc->skipped = 0;
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out:
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if (!enable)
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intel_crtc_crc_setup_workarounds(to_intel_crtc(crtc), false);
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intel_crtc_crc_setup_workarounds(crtc, false);
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intel_display_power_put(dev_priv, power_domain, wakeref);
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return ret;
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}
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void intel_crtc_enable_pipe_crc(struct intel_crtc *intel_crtc)
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void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)
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{
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struct drm_crtc *crtc = &intel_crtc->base;
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struct drm_i915_private *dev_priv = to_i915(crtc->dev);
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struct intel_pipe_crc *pipe_crc = &intel_crtc->pipe_crc;
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
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enum pipe pipe = crtc->pipe;
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u32 val = 0;
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if (!crtc->crc.opened)
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if (!crtc->base.crc.opened)
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return;
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if (get_new_crc_ctl_reg(dev_priv, crtc->index, &pipe_crc->source, &val) < 0)
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if (get_new_crc_ctl_reg(dev_priv, pipe, &pipe_crc->source, &val) < 0)
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return;
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/* Don't need pipe_crc->lock here, IRQs are not generated. */
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pipe_crc->skipped = 0;
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intel_de_write(dev_priv, PIPE_CRC_CTL(crtc->index), val);
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intel_de_posting_read(dev_priv, PIPE_CRC_CTL(crtc->index));
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intel_de_write(dev_priv, PIPE_CRC_CTL(pipe), val);
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intel_de_posting_read(dev_priv, PIPE_CRC_CTL(pipe));
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}
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void intel_crtc_disable_pipe_crc(struct intel_crtc *intel_crtc)
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void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
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{
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struct drm_crtc *crtc = &intel_crtc->base;
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struct drm_i915_private *dev_priv = to_i915(crtc->dev);
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struct intel_pipe_crc *pipe_crc = &intel_crtc->pipe_crc;
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
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enum pipe pipe = crtc->pipe;
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/* Swallow crc's until we stop generating them. */
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spin_lock_irq(&pipe_crc->lock);
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pipe_crc->skipped = INT_MIN;
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spin_unlock_irq(&pipe_crc->lock);
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intel_de_write(dev_priv, PIPE_CRC_CTL(crtc->index), 0);
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intel_de_posting_read(dev_priv, PIPE_CRC_CTL(crtc->index));
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intel_de_write(dev_priv, PIPE_CRC_CTL(pipe), 0);
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intel_de_posting_read(dev_priv, PIPE_CRC_CTL(pipe));
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intel_synchronize_irq(dev_priv);
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}
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