clk: qcom: gcc-msm8998: Drop hmss_dvm and lpass_at

Disabling gcc_hmss_dvm_bus_clk and gcc_lpass_at_clk causes the board to
lock up, and by that preventing the kernel to boot without
clk_ignore_unused.

gcc_hmss_dvm_bus_clk is marked always-on downstream, but not referenced,
and gcc_lpass_at_clk isn't mentioned. So let's remove them until they
are needed by some client.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Bjorn Andersson 2018-12-03 10:33:28 -08:00 committed by Stephen Boyd
parent c0cb7c7e71
commit b0d2e8a0cd
1 changed files with 0 additions and 28 deletions

View File

@ -1975,19 +1975,6 @@ static struct clk_branch gcc_hmss_at_clk = {
},
};
static struct clk_branch gcc_hmss_dvm_bus_clk = {
.halt_reg = 0x4808c,
.halt_check = BRANCH_HALT,
.clkr = {
.enable_reg = 0x4808c,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_hmss_dvm_bus_clk",
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch gcc_hmss_rbcpr_clk = {
.halt_reg = 0x48008,
.halt_check = BRANCH_HALT,
@ -2018,19 +2005,6 @@ static struct clk_branch gcc_hmss_trig_clk = {
},
};
static struct clk_branch gcc_lpass_at_clk = {
.halt_reg = 0x47020,
.halt_check = BRANCH_HALT,
.clkr = {
.enable_reg = 0x47020,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_lpass_at_clk",
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch gcc_lpass_trig_clk = {
.halt_reg = 0x4701c,
.halt_check = BRANCH_HALT,
@ -2664,10 +2638,8 @@ static struct clk_regmap *gcc_msm8998_clocks[] = {
[GCC_GPU_SNOC_DVM_GFX_CLK] = &gcc_gpu_snoc_dvm_gfx_clk.clkr,
[GCC_HMSS_AHB_CLK] = &gcc_hmss_ahb_clk.clkr,
[GCC_HMSS_AT_CLK] = &gcc_hmss_at_clk.clkr,
[GCC_HMSS_DVM_BUS_CLK] = &gcc_hmss_dvm_bus_clk.clkr,
[GCC_HMSS_RBCPR_CLK] = &gcc_hmss_rbcpr_clk.clkr,
[GCC_HMSS_TRIG_CLK] = &gcc_hmss_trig_clk.clkr,
[GCC_LPASS_AT_CLK] = &gcc_lpass_at_clk.clkr,
[GCC_LPASS_TRIG_CLK] = &gcc_lpass_trig_clk.clkr,
[GCC_MMSS_NOC_CFG_AHB_CLK] = &gcc_mmss_noc_cfg_ahb_clk.clkr,
[GCC_MMSS_QM_AHB_CLK] = &gcc_mmss_qm_ahb_clk.clkr,