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m68knommu: Coldfire GPIO corrections 

Pin 0 of the EPORT is not connected on the 523x, 5271, 5275 and 528x and the
TIMER on the 523x has 8 pins, not 4.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Steven King 2009-10-15 12:54:41 -07:00 committed by Greg Ungerer
parent d6f80e3a2a
commit b0d22d66fd
3 changed files with 8 additions and 5 deletions
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5
arch/m68knommu/platform/523x/gpio.c
View File

@ -30,7 +30,8 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
.direction_output = mcf_gpio_direction_output,
.get = mcf_gpio_get_value,
.set = mcf_gpio_set_value,
.ngpio = 8,
.base = 1,
.ngpio = 7,
},
.pddr = MCFEPORT_EPDDR,
.podr = MCFEPORT_EPDR,
@ -244,7 +245,7 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
.get = mcf_gpio_get_value,
.set = mcf_gpio_set_value_fast,
.base = 96,
.ngpio = 4,
.ngpio = 8,
},
.pddr = MCFGPIO_PDDR_TIMER,
.podr = MCFGPIO_PODR_TIMER,

6
arch/m68knommu/platform/527x/gpio.c
View File

@ -31,7 +31,8 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
.direction_output = mcf_gpio_direction_output,
.get = mcf_gpio_get_value,
.set = mcf_gpio_set_value,
.ngpio = 8,
.base = 1,
.ngpio = 7,
},
.pddr = MCFEPORT_EPDDR,
.podr = MCFEPORT_EPDR,
@ -263,7 +264,8 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
.direction_output = mcf_gpio_direction_output,
.get = mcf_gpio_get_value,
.set = mcf_gpio_set_value,
.ngpio = 8,
.base = 1,
.ngpio = 7,
},
.pddr = MCFEPORT_EPDDR,
.podr = MCFEPORT_EPDR,

2
arch/m68knommu/platform/528x/gpio.c
View File

@ -31,7 +31,7 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
.get = mcf_gpio_get_value,
.set = mcf_gpio_set_value,
.base = 1,
.ngpio = 8,
.ngpio = 7,
},
.pddr = MCFEPORT_EPDDR,
.podr = MCFEPORT_EPDR,