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tg3: Move phy accessor functions higher 

Phy accessor functions should live closer to where the base phy read /
write routines are.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Matt Carlson 2011-04-20 07:57:39 +00:00 committed by David S. Miller
parent 34eea5ac21
commit b0988c15c1
1 changed files with 68 additions and 68 deletions
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136
drivers/net/tg3.c
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@ -881,6 +881,74 @@ static int tg3_writephy(struct tg3 *tp, int reg, u32 val)
return ret; return ret;
} }
static int tg3_phy_cl45_write(struct tg3 *tp, u32 devad, u32 addr, u32 val)
{
int err;
err = tg3_writephy(tp, MII_TG3_MMD_CTRL, devad);
if (err)
goto done;
err = tg3_writephy(tp, MII_TG3_MMD_ADDRESS, addr);
if (err)
goto done;
err = tg3_writephy(tp, MII_TG3_MMD_CTRL,
MII_TG3_MMD_CTRL_DATA_NOINC | devad);
if (err)
goto done;
err = tg3_writephy(tp, MII_TG3_MMD_ADDRESS, val);
done:
return err;
}
static int tg3_phy_cl45_read(struct tg3 *tp, u32 devad, u32 addr, u32 *val)
{
int err;
err = tg3_writephy(tp, MII_TG3_MMD_CTRL, devad);
if (err)
goto done;
err = tg3_writephy(tp, MII_TG3_MMD_ADDRESS, addr);
if (err)
goto done;
err = tg3_writephy(tp, MII_TG3_MMD_CTRL,
MII_TG3_MMD_CTRL_DATA_NOINC | devad);
if (err)
goto done;
err = tg3_readphy(tp, MII_TG3_MMD_ADDRESS, val);
done:
return err;
}
static int tg3_phydsp_read(struct tg3 *tp, u32 reg, u32 *val)
{
int err;
err = tg3_writephy(tp, MII_TG3_DSP_ADDRESS, reg);
if (!err)
err = tg3_readphy(tp, MII_TG3_DSP_RW_PORT, val);
return err;
}
static int tg3_phydsp_write(struct tg3 *tp, u32 reg, u32 val)
{
int err;
err = tg3_writephy(tp, MII_TG3_DSP_ADDRESS, reg);
if (!err)
err = tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val);
return err;
}
static int tg3_bmcr_reset(struct tg3 *tp) static int tg3_bmcr_reset(struct tg3 *tp)
{ {
u32 phy_control; u32 phy_control;
@ -1154,52 +1222,6 @@ static void tg3_mdio_fini(struct tg3 *tp)
} }
} }
static int tg3_phy_cl45_write(struct tg3 *tp, u32 devad, u32 addr, u32 val)
{
int err;
err = tg3_writephy(tp, MII_TG3_MMD_CTRL, devad);
if (err)
goto done;
err = tg3_writephy(tp, MII_TG3_MMD_ADDRESS, addr);
if (err)
goto done;
err = tg3_writephy(tp, MII_TG3_MMD_CTRL,
MII_TG3_MMD_CTRL_DATA_NOINC | devad);
if (err)
goto done;
err = tg3_writephy(tp, MII_TG3_MMD_ADDRESS, val);
done:
return err;
}
static int tg3_phy_cl45_read(struct tg3 *tp, u32 devad, u32 addr, u32 *val)
{
int err;
err = tg3_writephy(tp, MII_TG3_MMD_CTRL, devad);
if (err)
goto done;
err = tg3_writephy(tp, MII_TG3_MMD_ADDRESS, addr);
if (err)
goto done;
err = tg3_writephy(tp, MII_TG3_MMD_CTRL,
MII_TG3_MMD_CTRL_DATA_NOINC | devad);
if (err)
goto done;
err = tg3_readphy(tp, MII_TG3_MMD_ADDRESS, val);
done:
return err;
}
/* tp->lock is held. */ /* tp->lock is held. */
static inline void tg3_generate_fw_event(struct tg3 *tp) static inline void tg3_generate_fw_event(struct tg3 *tp)
{ {
@ -1576,28 +1598,6 @@ static void tg3_phy_fini(struct tg3 *tp)
} }
} }
static int tg3_phydsp_read(struct tg3 *tp, u32 reg, u32 *val)
{
int err;
err = tg3_writephy(tp, MII_TG3_DSP_ADDRESS, reg);
if (!err)
err = tg3_readphy(tp, MII_TG3_DSP_RW_PORT, val);
return err;
}
static int tg3_phydsp_write(struct tg3 *tp, u32 reg, u32 val)
{
int err;
err = tg3_writephy(tp, MII_TG3_DSP_ADDRESS, reg);
if (!err)
err = tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val);
return err;
}
static void tg3_phy_fet_toggle_apd(struct tg3 *tp, bool enable) static void tg3_phy_fet_toggle_apd(struct tg3 *tp, bool enable)
{ {
u32 phytest; u32 phytest;