ARM: tegra: fixes for 3.7-rc2
This branch contains a couple small fixes for Tegra for 3.7. * A fix for another clock rate calculation overflow * A revert of a change that removed the "timer" clock on Tegra, coupled with a fix for the confusing symbol name clash that triggered it. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iQIcBAABAgAGBQJQfzn3AAoJEMzrak5tbycxAOEQAIWu3M+9SeKD68QE3yVSuyBL zKAQc5/aZINZxVpR54d8ywIJ7XlLkYatYvniv3x9tyiQ9VZ9b+G63NGHyolAFEjE 4wOWpJ0UmKdEIkJIGTqiFoAifzSjRaoSZcB7Mu+HpY+COKcYeey6riPqNo8KtNTp u01qUg1iTwLiNHq79A/4LGs0XcVLDnsVK3xxuNYSeCGBRHXaAYeJgk6BmUJ6WMKv 0lKdlGOQN5qKcwvJUkP6fqigcmAJ12MD1MLEDOAPh230h7tUzPLOqydcqPQG6E7M zQyiRzJBqxO/tbEkc3ZPaPAjgRARlU92PSqIcg4XTnr7B+TmBkgsfUS7L8n+1lXx UvPh4cmfj9QAjelwZkxqYU6AtKsLRXUijGfV/BWaHoUvfd/9Sz3VlL5octkLrKfl EzXJ7fG4nX9DRoszAEGAHl9Pv60bcdg0lMiHbY6Ot+AJPLccZqz9MkRTs/GLBhZq btxq3zi66pw1SX8MVH2Yn5fO6ZxXtOz1XnypAd/T3oBcuxPGkQqULXTLpmThPDYV OILg67mHHpzdF1LVLTZoRBateGFyiwTWpy8ChVTSepriUzdfbyT2fZwvo4n0ryY9 lN2xzuuo+4upw2GWFT1+mJ8dpsA7MDo3TwTdIlSLzuN7gSW59U9C5zpJYDFXMscK C4FYIKmUra9G7dQC3xBr =Cjt7 -----END PGP SIGNATURE----- Merge tag 'tegra-for-3.7-fixes-for-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into fixes From Stephen Warren: ARM: tegra: fixes for 3.7-rc2 This branch contains a couple small fixes for Tegra for 3.7. * A fix for another clock rate calculation overflow * A revert of a change that removed the "timer" clock on Tegra, coupled with a fix for the confusing symbol name clash that triggered it. * tag 'tegra-for-3.7-fixes-for-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ARM: tegra: add tegra_timer clock ARM: tegra: rename tegra system timer ARM: tegra30: clk: Fix output_rate overflow Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
b08d48414e
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@ -182,7 +182,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
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.init_early = tegra20_init_early,
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.init_irq = tegra_dt_init_irq,
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.handle_irq = gic_handle_irq,
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.timer = &tegra_timer,
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.timer = &tegra_sys_timer,
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.init_machine = tegra_dt_init,
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.init_late = tegra_dt_init_late,
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.restart = tegra_assert_system_reset,
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@ -89,7 +89,7 @@ DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")
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.init_early = tegra30_init_early,
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.init_irq = tegra_dt_init_irq,
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.handle_irq = gic_handle_irq,
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.timer = &tegra_timer,
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.timer = &tegra_sys_timer,
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.init_machine = tegra30_dt_init,
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.init_late = tegra_init_late,
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.restart = tegra_assert_system_reset,
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@ -55,5 +55,5 @@ static inline int harmony_pcie_init(void) { return 0; }
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void __init tegra_paz00_wifikill_init(void);
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extern struct sys_timer tegra_timer;
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extern struct sys_timer tegra_sys_timer;
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#endif
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@ -953,6 +953,7 @@ PERIPH_CLK(pcie_xclk, NULL, "pcie_xclk", 74, 0, 26000000, mux_clk_m,
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static struct clk *tegra_list_clks[] = {
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&tegra_apbdma,
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&tegra_rtc,
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&tegra_timer,
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&tegra_i2s1,
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&tegra_i2s2,
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&tegra_spdif_out,
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@ -1199,7 +1199,7 @@ static long tegra30_pll_round_rate(struct clk_hw *hw, unsigned long rate,
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{
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struct clk_tegra *c = to_clk_tegra(hw);
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unsigned long input_rate = *prate;
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unsigned long output_rate = *prate;
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u64 output_rate = *prate;
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const struct clk_pll_freq_table *sel;
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struct clk_pll_freq_table cfg;
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int mul;
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@ -1143,6 +1143,7 @@ struct clk *tegra_list_clks[] = {
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&tegra_apbdma,
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&tegra_rtc,
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&tegra_kbc,
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&tegra_timer,
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&tegra_kfuse,
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&tegra_fuse,
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&tegra_fuse_burn,
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@ -245,7 +245,7 @@ static void __init tegra_init_timer(void)
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register_persistent_clock(NULL, tegra_read_persistent_clock);
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}
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struct sys_timer tegra_timer = {
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struct sys_timer tegra_sys_timer = {
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.init = tegra_init_timer,
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};
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