dt-bindings: net: Convert Altera TSE bindings to yaml
Convert the bindings for the Altera Triple-Speed Ethernet to yaml. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Maxime Chevallier
David S. Miller
parent
9837ec955b
commit
b0155d9096
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* Altera Triple-Speed Ethernet MAC driver (TSE)
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Required properties:
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- compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should
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be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE.
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ALTR is supported for legacy device trees, but is deprecated.
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altr should be used for all new designs.
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- reg: Address and length of the register set for the device. It contains
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the information of registers in the same order as described by reg-names
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- reg-names: Should contain the reg names
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"control_port": MAC configuration space region
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"tx_csr": xDMA Tx dispatcher control and status space region
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"tx_desc": MSGDMA Tx dispatcher descriptor space region
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"rx_csr" : xDMA Rx dispatcher control and status space region
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"rx_desc": MSGDMA Rx dispatcher descriptor space region
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"rx_resp": MSGDMA Rx dispatcher response space region
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"s1": SGDMA descriptor memory
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- interrupts: Should contain the TSE interrupts and its mode.
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- interrupt-names: Should contain the interrupt names
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"rx_irq": xDMA Rx dispatcher interrupt
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"tx_irq": xDMA Tx dispatcher interrupt
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- rx-fifo-depth: MAC receive FIFO buffer depth in bytes
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- tx-fifo-depth: MAC transmit FIFO buffer depth in bytes
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- phy-mode: See ethernet.txt in the same directory.
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- phy-handle: See ethernet.txt in the same directory.
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- phy-addr: See ethernet.txt in the same directory. A configuration should
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include phy-handle or phy-addr.
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- altr,has-supplementary-unicast:
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If present, TSE supports additional unicast addresses.
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Otherwise additional unicast addresses are not supported.
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- altr,has-hash-multicast-filter:
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If present, TSE supports a hash based multicast filter.
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Otherwise, hash-based multicast filtering is not supported.
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- mdio device tree subnode: When the TSE has a phy connected to its local
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mdio, there must be device tree subnode with the following
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required properties:
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- compatible: Must be "altr,tse-mdio".
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- #address-cells: Must be <1>.
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- #size-cells: Must be <0>.
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For each phy on the mdio bus, there must be a node with the following
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fields:
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- reg: phy id used to communicate to phy.
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- device_type: Must be "ethernet-phy".
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The MAC address will be determined using the optional properties defined in
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ethernet.txt.
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Example:
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tse_sub_0_eth_tse_0: ethernet@1,00000000 {
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compatible = "altr,tse-msgdma-1.0";
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reg = <0x00000001 0x00000000 0x00000400>,
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<0x00000001 0x00000460 0x00000020>,
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<0x00000001 0x00000480 0x00000020>,
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<0x00000001 0x000004A0 0x00000008>,
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<0x00000001 0x00000400 0x00000020>,
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<0x00000001 0x00000420 0x00000020>;
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reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
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interrupt-parent = <&hps_0_arm_gic_0>;
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interrupts = <0 41 4>, <0 40 4>;
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interrupt-names = "rx_irq", "tx_irq";
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rx-fifo-depth = <2048>;
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tx-fifo-depth = <2048>;
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address-bits = <48>;
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max-frame-size = <1500>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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phy-mode = "gmii";
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altr,has-supplementary-unicast;
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altr,has-hash-multicast-filter;
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phy-handle = <&phy0>;
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mdio {
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compatible = "altr,tse-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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device_type = "ethernet-phy";
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};
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phy1: ethernet-phy@1 {
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reg = <0x1>;
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device_type = "ethernet-phy";
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};
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};
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};
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tse_sub_1_eth_tse_0: ethernet@1,00001000 {
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compatible = "altr,tse-msgdma-1.0";
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reg = <0x00000001 0x00001000 0x00000400>,
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<0x00000001 0x00001460 0x00000020>,
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<0x00000001 0x00001480 0x00000020>,
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<0x00000001 0x000014A0 0x00000008>,
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<0x00000001 0x00001400 0x00000020>,
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<0x00000001 0x00001420 0x00000020>;
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reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
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interrupt-parent = <&hps_0_arm_gic_0>;
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interrupts = <0 43 4>, <0 42 4>;
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interrupt-names = "rx_irq", "tx_irq";
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rx-fifo-depth = <2048>;
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tx-fifo-depth = <2048>;
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address-bits = <48>;
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max-frame-size = <1500>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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phy-mode = "gmii";
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altr,has-supplementary-unicast;
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altr,has-hash-multicast-filter;
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phy-handle = <&phy1>;
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};
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@ -0,0 +1,141 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/altr,tse.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Altera Triple Speed Ethernet MAC driver (TSE)
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maintainers:
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- Maxime Chevallier <maxime.chevallier@bootlin.com>
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properties:
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compatible:
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oneOf:
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- const: altr,tse-1.0
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- const: ALTR,tse-1.0
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deprecated: true
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- const: altr,tse-msgdma-1.0
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interrupts:
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minItems: 2
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interrupt-names:
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items:
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- const: rx_irq
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- const: tx_irq
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rx-fifo-depth:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Depth in bytes of the RX FIFO
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tx-fifo-depth:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Depth in bytes of the TX FIFO
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altr,has-supplementary-unicast:
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type: boolean
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description:
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If present, TSE supports additional unicast addresses.
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altr,has-hash-multicast-filter:
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type: boolean
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description:
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If present, TSE supports hash based multicast filter.
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mdio:
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$ref: mdio.yaml#
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unevaluatedProperties: false
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description:
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Creates and registers an MDIO bus.
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properties:
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compatible:
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const: altr,tse-mdio
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required:
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- compatible
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required:
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- compatible
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- reg
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- interrupts
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- rx-fifo-depth
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- tx-fifo-depth
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allOf:
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- $ref: "ethernet-controller.yaml#"
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- if:
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properties:
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compatible:
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contains:
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enum:
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- const: altr,tse-1.0
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- const: ALTR,tse-1.0
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then:
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properties:
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reg:
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minItems: 4
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reg-names:
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items:
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- const: control_port
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- const: rx_csr
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- const: tx_csr
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- const: s1
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- if:
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properties:
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compatible:
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contains:
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enum:
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- altr,tse-msgdma-1.0
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then:
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properties:
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reg:
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minItems: 6
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reg-names:
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items:
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- const: control_port
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- const: rx_csr
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- const: rx_desc
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- const: rx_resp
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- const: tx_csr
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- const: tx_desc
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unevaluatedProperties: false
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examples:
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- |
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tse_sub_1_eth_tse_0: ethernet@1,00001000 {
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compatible = "altr,tse-msgdma-1.0";
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reg = <0x00001000 0x00000400>,
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<0x00001460 0x00000020>,
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<0x00001480 0x00000020>,
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<0x000014A0 0x00000008>,
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<0x00001400 0x00000020>,
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<0x00001420 0x00000020>;
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reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
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interrupt-parent = <&hps_0_arm_gic_0>;
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interrupts = <0 43 4>, <0 42 4>;
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interrupt-names = "rx_irq", "tx_irq";
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rx-fifo-depth = <2048>;
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tx-fifo-depth = <2048>;
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max-frame-size = <1500>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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phy-mode = "gmii";
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altr,has-supplementary-unicast;
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altr,has-hash-multicast-filter;
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phy-handle = <&phy1>;
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mdio {
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compatible = "altr,tse-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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phy1: ethernet-phy@1 {
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reg = <0x1>;
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};
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};
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};
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...
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