Documentation: Explain pci=conf1,conf2 more verbosely
People complained that setting the PCI config space access mechanism through "pci=conf1" or "pci=conf2" on the command line is not really documented. Yeah, can you blame them? Look at what we have now. So try to improve the situation a bit by explaining what those "conf1" and "conf2" things actually mean. See http://wiki.osdev.org/PCI for more info. Suggested-by: Eric Morton <Eric.Morton@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> [jc: Added the above URL to the document too] Signed-off-by: Jonathan Corbet <corbet@lwn.net>
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@ -2736,10 +2736,16 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
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hardware access methods are allowed. Use this
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if you experience crashes upon bootup and you
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suspect they are caused by the BIOS.
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conf1 [X86] Force use of PCI Configuration
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Mechanism 1.
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conf2 [X86] Force use of PCI Configuration
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Mechanism 2.
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conf1 [X86] Force use of PCI Configuration Access
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Mechanism 1 (config address in IO port 0xCF8,
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data in IO port 0xCFC, both 32-bit).
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conf2 [X86] Force use of PCI Configuration Access
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Mechanism 2 (IO port 0xCF8 is an 8-bit port for
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the function, IO port 0xCFA, also 8-bit, sets
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bus number. The config space is then accessed
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through ports 0xC000-0xCFFF).
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See http://wiki.osdev.org/PCI for more info
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on the configuration access mechanisms.
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noaer [PCIE] If the PCIEAER kernel config parameter is
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enabled, this kernel boot option can be used to
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disable the use of PCIE advanced error reporting.
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