Tegra SoC and clock controller changes for v5.11

Export symbols and add stubs necessary for upcoming modified Tegra
 memory controller drivers (touching also devfreq and interconnect).
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl+826IQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1zhJEACH+n5n7l1GIP+pqgizl3I4eg6DJaZqnS0i
 JeW/f20sjT0jpdOP2YsqlNxdNrTceQAYEceIZFo85erQzX2v27Jdw3+xOrisUFCn
 GrA+wrLLEs9hJ6YS1+XBET2lzc5C8XxKhODrXNBTsU1BN4kDkso40/Xiz1QbP4Ty
 P0kUwqNEU/rdRPCHP1Gpa4Y/QGBRqtm9FPEwRjvURKjuFwHEjX2hpOZJd2TJCS7U
 I4pCxKuokI+NGiF9fvw5XzZZ/UhWTu193jVGkT1A3aHlRZ9ZIJHb/qqUsT4aGNW7
 5WSwLHCkvI5jkNy4JnYQzKAumQLpfxS0R53cHYQ8MeRbuiR37Pu3f0KWM/yDB3cZ
 0Sy/YMFOa6C9hRfRO+zq2t0KMO7PXcZ7S2T81YAvs/048rWOT8wleZfw9OiQgtJg
 9k8Yr5lhvr2KCznOZcTbMlpIH9c0ynS3MrOOGt7UY5UEBw57zbhaKkqcP/tazLzZ
 s+GKbdv6aVSUIJzJOIr6Ib/wHXN9lx1Bwb0VBbGIa2PJT6fnhKjWnH/LZNIwzaH8
 yWyTTm1y1AyNNWeeYexm21L0eDAQgbXSqejuQ9/kNZCQXwdGEQS9WtOxeq3OFU6m
 bnuJR1DS1wDXaCRGT6604PPXpRK4o1itY02B81uNulnwr3420Hkl6oULIfu1CIwZ
 PSeZvspRtQ==
 =LK/N
 -----END PGP SIGNATURE-----

Merge tag 'tegra-soc-clk-drivers-5.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into devfreq-next

Tegra SoC and clock controller changes for v5.11

Export symbols and add stubs necessary for upcoming modified Tegra
memory controller drivers (touching also devfreq and interconnect).
This commit is contained in:
Chanwoo Choi 2020-12-07 10:25:03 +09:00
commit afd589c703
3 changed files with 9 additions and 0 deletions

View File

@ -13,6 +13,7 @@
#include <linux/clk-provider.h>
#include <linux/clk/tegra.h>
#include <linux/err.h>
#include <linux/export.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/slab.h>
@ -235,6 +236,7 @@ void tegra20_clk_set_emc_round_callback(tegra20_clk_emc_round_cb *round_cb,
emc->cb_arg = cb_arg;
}
}
EXPORT_SYMBOL_GPL(tegra20_clk_set_emc_round_callback);
bool tegra20_clk_emc_driver_available(struct clk_hw *emc_hw)
{
@ -291,3 +293,4 @@ int tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same)
return 0;
}
EXPORT_SYMBOL_GPL(tegra20_clk_prepare_emc_mc_same_freq);

View File

@ -3,6 +3,7 @@
* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
*/
#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/of_address.h>
@ -90,6 +91,7 @@ u32 tegra_read_ram_code(void)
return straps >> PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT;
}
EXPORT_SYMBOL_GPL(tegra_read_ram_code);
static const struct of_device_id apbmisc_match[] __initconst = {
{ .compatible = "nvidia,tegra20-apbmisc", },

View File

@ -56,7 +56,11 @@ u32 tegra_read_straps(void);
u32 tegra_read_ram_code(void);
int tegra_fuse_readl(unsigned long offset, u32 *value);
#ifdef CONFIG_ARCH_TEGRA
extern struct tegra_sku_info tegra_sku_info;
#else
static struct tegra_sku_info tegra_sku_info __maybe_unused;
#endif
struct device *tegra_soc_device_register(void);