arm64: dts: imx8mp-evk: correct pcie pad settings
According to RM bit layout, BIT3 and BIT0 are reserved.
8 7 6 5 4 3 2 1 0
PE HYS PUE ODE FSEL X DSE X
Although function is not broken, we should not set reserved bit.
Fixes: d506505000
("arm64: dts: imx8mp-evk: Add PCIe support")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -544,14 +544,14 @@
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pinctrl_pcie0: pcie0grp {
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fsl,pins = <
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MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B 0x61 /* open drain, pull up */
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MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07 0x41
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MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B 0x60 /* open drain, pull up */
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MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07 0x40
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>;
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};
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pinctrl_pcie0_reg: pcie0reggrp {
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fsl,pins = <
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MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x41
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MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40
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>;
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};
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