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ARM: SoC non-urgent fixes for merge window 

We sometimes collect non-critical fixes that come in during the later part
 of the merge window in a branch for the next release instead, and this is
 that contents for v4.11.
 
 Most of these are OMAP fixes, dealing with OMAP36/37 detection, quirks
 and setup. There's also some fixes for Davinci and a Kconfig fix for SCPI
 to only enable on ARM{,64}.
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Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-urgent fixes from Arnd Bergmann:
 "We sometimes collect non-critical fixes that come in during the later
  part of the merge window in a branch for the next release instead, and
  this is that contents for v4.11.

  Most of these are OMAP fixes, dealing with OMAP36/37 detection, quirks
  and setup. There's also some fixes for Davinci and a Kconfig fix for
  SCPI to only enable on ARM{,64}"

* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  firmware: arm_scpi: Add hardware dependencies
  ARM: OMAP3: Fix SoC detection of OMAP36/37 Family
  ARM: OMAP5: Add HWMOD_SWSUP_SIDLE_ACT flag for UART
  ARM: dts: Fix compatible for ti81xx uarts for 8250
  ARM: dts: Fix am335x and dm814x scm syscon to probe children
  ARM: OMAP2+: Fix init for multiple quirks for the same SoC
  ARM: dts: Fix omap3 off mode pull defines
  bus: da850-mstpri: fix my e-mail address
  ARM: davinci: da850: fix da850_set_pll0rate()
  ARM: davinci: da850: coding style fix
This commit is contained in:
Linus Torvalds 2017-02-23 15:28:04 -08:00
parent 60e8d3e116 92f3e6ebf6
commit af8999f672
11 changed files with 49 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/boot/dts/am33xx.dtsi
View File

@ -145,10 +145,11 @@
};
scm_conf: scm_conf@0 {
compatible = "syscon";
compatible = "syscon", "simple-bus";
reg = <0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0x800>;
scm_clocks: clocks {
#address-cells = <1>;

9
arch/arm/boot/dts/dm814x.dtsi
View File

@ -252,7 +252,7 @@
};
uart1: uart@20000 {
compatible = "ti,omap3-uart";
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart1";
reg = <0x20000 0x2000>;
clock-frequency = <48000000>;
@ -262,7 +262,7 @@
};
uart2: uart@22000 {
compatible = "ti,omap3-uart";
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart2";
reg = <0x22000 0x2000>;
clock-frequency = <48000000>;
@ -272,7 +272,7 @@
};
uart3: uart@24000 {
compatible = "ti,omap3-uart";
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart3";
reg = <0x24000 0x2000>;
clock-frequency = <48000000>;
@ -332,10 +332,11 @@
ranges = <0 0x140000 0x20000>;
scm_conf: scm_conf@0 {
compatible = "syscon";
compatible = "syscon", "simple-bus";
reg = <0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0x800>;
scm_clocks: clocks {
#address-cells = <1>;

6
arch/arm/boot/dts/dm816x.dtsi
View File

@ -373,7 +373,7 @@
};
uart1: uart@48020000 {
compatible = "ti,omap3-uart";
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart1";
reg = <0x48020000 0x2000>;
clock-frequency = <48000000>;
@ -383,7 +383,7 @@
};
uart2: uart@48022000 {
compatible = "ti,omap3-uart";
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart2";
reg = <0x48022000 0x2000>;
clock-frequency = <48000000>;
@ -393,7 +393,7 @@
};
uart3: uart@48024000 {
compatible = "ti,omap3-uart";
compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart3";
reg = <0x48024000 0x2000>;
clock-frequency = <48000000>;

24
arch/arm/mach-davinci/da850.c
View File

@ -563,7 +563,7 @@ static struct clk_lookup da850_clks[] = {
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
CLK("vpif", NULL, &vpif_clk),
CLK("ahci_da850", NULL, &sata_clk),
CLK("ahci_da850", NULL, &sata_clk),
CLK("davinci-rproc.0", NULL, &dsp_clk),
CLK(NULL, NULL, &ehrpwm_clk),
CLK("ehrpwm.0", "fck", &ehrpwm0_clk),
@ -1194,14 +1194,28 @@ static int da850_set_armrate(struct clk *clk, unsigned long index)
return clk_set_rate(pllclk, index);
}
static int da850_set_pll0rate(struct clk *clk, unsigned long index)
static int da850_set_pll0rate(struct clk *clk, unsigned long rate)
{
unsigned int prediv, mult, postdiv;
struct da850_opp *opp;
struct pll_data *pll = clk->pll_data;
struct cpufreq_frequency_table *freq;
unsigned int prediv, mult, postdiv;
struct da850_opp *opp = NULL;
int ret;
opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data;
rate /= 1000;
for (freq = da850_freq_table;
freq->frequency != CPUFREQ_TABLE_END; freq++) {
/* rate is in Hz, freq->frequency is in KHz */
if (freq->frequency == rate) {
opp = (struct da850_opp *)freq->driver_data;
break;
}
}
if (!opp)
return -EINVAL;
prediv = opp->prediv;
mult = opp->mult;
postdiv = opp->postdiv;

10
arch/arm/mach-omap2/id.c
View File

@ -223,7 +223,15 @@ static void __init omap3_cpuinfo(void)
* and CPU class bits.
*/
if (soc_is_omap3630()) {
cpu_name = "OMAP3630";
if (omap3_has_iva() && omap3_has_sgx()) {
cpu_name = (omap3_has_isp()) ? "OMAP3630/DM3730" : "OMAP3621";
} else if (omap3_has_iva()) {
cpu_name = "DM3725";
} else if (omap3_has_sgx()) {
cpu_name = "OMAP3615/AM3715";
} else {
cpu_name = (omap3_has_isp()) ? "AM3703" : "OMAP3611";
}
} else if (soc_is_am35xx()) {
cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
} else if (soc_is_ti816x()) {

8
arch/arm/mach-omap2/omap_hwmod_54xx_data.c
View File

@ -1748,6 +1748,7 @@ static struct omap_hwmod omap54xx_uart1_hwmod = {
.name = "uart1",
.class = &omap54xx_uart_hwmod_class,
.clkdm_name = "l4per_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
.main_clk = "func_48m_fclk",
.prcm = {
.omap4 = {
@ -1763,6 +1764,7 @@ static struct omap_hwmod omap54xx_uart2_hwmod = {
.name = "uart2",
.class = &omap54xx_uart_hwmod_class,
.clkdm_name = "l4per_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
.main_clk = "func_48m_fclk",
.prcm = {
.omap4 = {
@ -1778,7 +1780,7 @@ static struct omap_hwmod omap54xx_uart3_hwmod = {
.name = "uart3",
.class = &omap54xx_uart_hwmod_class,
.clkdm_name = "l4per_clkdm",
.flags = DEBUG_OMAP4UART3_FLAGS,
.flags = DEBUG_OMAP4UART3_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
.main_clk = "func_48m_fclk",
.prcm = {
.omap4 = {
@ -1794,7 +1796,7 @@ static struct omap_hwmod omap54xx_uart4_hwmod = {
.name = "uart4",
.class = &omap54xx_uart_hwmod_class,
.clkdm_name = "l4per_clkdm",
.flags = DEBUG_OMAP4UART4_FLAGS,
.flags = DEBUG_OMAP4UART4_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
.main_clk = "func_48m_fclk",
.prcm = {
.omap4 = {
@ -1810,6 +1812,7 @@ static struct omap_hwmod omap54xx_uart5_hwmod = {
.name = "uart5",
.class = &omap54xx_uart_hwmod_class,
.clkdm_name = "l4per_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
.main_clk = "func_48m_fclk",
.prcm = {
.omap4 = {
@ -1825,6 +1828,7 @@ static struct omap_hwmod omap54xx_uart6_hwmod = {
.name = "uart6",
.class = &omap54xx_uart_hwmod_class,
.clkdm_name = "l4per_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
.main_clk = "func_48m_fclk",
.prcm = {
.omap4 = {

1
arch/arm/mach-omap2/pdata-quirks.c
View File

@ -599,7 +599,6 @@ static void pdata_quirks_check(struct pdata_init *quirks)
if (of_machine_is_compatible(quirks->compatible)) {
if (quirks->fn)
quirks->fn();
break;
}
quirks++;
}

2
drivers/bus/da8xx-mstpri.c
View File

@ -4,7 +4,7 @@
* Copyright (C) 2016 BayLibre SAS
*
* Author:
* Bartosz Golaszewski <bgolaszewski@baylibre.com.com>
* Bartosz Golaszewski <bgolaszewski@baylibre.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as

2
drivers/cpufreq/davinci-cpufreq.c
View File

@ -55,7 +55,7 @@ static int davinci_target(struct cpufreq_policy *policy, unsigned int idx)
return ret;
}
ret = clk_set_rate(armclk, idx);
ret = clk_set_rate(armclk, new_freq * 1000);
if (ret)
return ret;

1
drivers/firmware/Kconfig
View File

@ -21,6 +21,7 @@ config ARM_PSCI_CHECKER
config ARM_SCPI_PROTOCOL
tristate "ARM System Control and Power Interface (SCPI) Message Protocol"
depends on ARM || ARM64 || COMPILE_TEST
depends on MAILBOX
help
System Control and Power Interface (SCPI) Message Protocol is

4
include/dt-bindings/pinctrl/omap.h
View File

@ -45,8 +45,8 @@
#define PIN_OFF_NONE 0
#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)
#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)
#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP)
#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN)
#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFFOUT_EN | OFF_PULL_EN | OFF_PULL_UP)
#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFFOUT_EN | OFF_PULL_EN)
#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
/*